Updated on 2024/08/09

Information

 

写真a

 
TAKANO KEISUKE
 
Organization
Faculty of Information Science and Electrical Engineering Department of Electronics Academic Researcher
Title
Academic Researcher
Contact information
メールアドレス
External link

Degree

  • Dr. Eng.

Research Interests・Research Keywords

  • Research theme:Study of Neuromorphic Computing for AI

    Keyword:Neuromorphic Computing, Digital Circuit Design

    Research period: 2022.9

Awards

  • 学術奨励賞

    2021.9   岡山理科大学  

  • 学生功労賞

    2018.3   電子情報通信学会 中国支部  

  • 工学部研究奨励賞

    2018.3   岡山理科大学  

  • 学生功労賞

    2017.3   電子情報通信学会 中国支部  

Papers

  • Design of The Ultra-Low-Power Driven VMM Configurations for μW Scale IoT Devices Reviewed International journal

    65 - 72   2024.1

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    Language:English   Publishing type:Research paper (international conference proceedings)  

    Operating IoT devices by supplying power from an energy harvester and installing AI accelerators in IoT devices are required. Nevertheless, conventionally selected architectures for AI processing require a large amount of power, making it difficult to operate in low-power bands such as IoT devices or even impossible to operate in the first place. Therefore, driving AI accelerators with power that energy harvesters can supply is an issue. However, there has been no past exploration of AI accelerators in the driven of the μW scale. In this paper, we analyze the configuration of Vector Matrix Multiplier, mainly used for AI accelerators, and show the effective configuration for μW scale IoT devices. Using 180nm CMOS to synthesize the four architectures of various sizes, we characterize device performance and analyze energy consumption and circuit area. As a result of the analysis, it shows that the configuration in which all calculations are deployed on the circuit can have the lowest energy consumption. In addition, we found that when there is a limit on circuit area, a configuration in which some calculations are performed in the time domain by lowering the voltage is suitable.

    DOI: https://doi.org/10.1109/MCSoC60832.2023.00018

  • PC-FPGA複合システムにおける分散処理の実現と評価 Reviewed

    高野恵輔, 小田哲也, 尾崎亮, 上嶋明, 小畑正貴

    電気学会論文誌C(電子・情報・システム部門誌)   142 ( 11 )   1199 - 1207   2022.11

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    Language:Japanese   Publishing type:Research paper (scientific journal)  

    DOI: 10.1541/ieejeiss.142.1199

  • Approach of a Coding Conventions for Warning and Suggestion in Transpiler for Rust Convert to RTL. Reviewed

    Keisuke Takano, Tetsuya Oda, Masaki Kohata

    9th IEEE Global Conference on Consumer Electronics(GCCE)   789 - 790   2020.10

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    Language:Others   Publishing type:Research paper (other academic)  

    DOI: 10.1109/GCCE50665.2020.9292032

  • Implementation of Process Migration Method for PC-FPGA Hybrid System. Reviewed

    Keisuke Takano, Tetsuya Oda, Ryo Ozaki, Akira Uejima, Masaki Kohata

    Advances on Broad-Band Wireless Computing, Communication and Applications - Proceedings of the 15th International Conference on Broad-Band and Wireless Computing, Communication and Applications (BWCCA-2020)(BWCCA)   204 - 210   2020.10

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    Language:Others   Publishing type:Research paper (other academic)  

    DOI: 10.1007/978-3-030-61108-8_20

  • PC process migration using FPGAs in ring networks Reviewed

    Keisuke Takano, Tetsuya Oda, Ryo Ozaki, Akira Uejima, Masaki Kohata

    IEICE Communications Express   9 ( 5 )   141 - 145   2020.5

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    Language:English   Publishing type:Research paper (scientific journal)  

    PC process migration using FPGAs in ring networks
    <p>This paper describes a method of process migration of PCs by FPGA-based ring networks. Here the original system configuration is given on the premise that the proposed hybrid cluster control circuit is used, and the communication protocol used on them is determined. The experiment results show that this system has the capability to perform PC process migration with FPGAs. The primary advantage of this system is that it is suitable for low-cost operations in which the PC is shut down after the process is entrusted to the FPGAs, and the result is obtained later.</p>

    DOI: 10.1587/comex.2019XBL0163

  • Design of a DSL for Converting Rust Programming Language into RTL. Reviewed

    Keisuke Takano, Tetsuya Oda, Masaki Kohata

    Advances in Internet, Data and Web Technologies, The 8th International Conference on Emerging Internet, Data and Web Technologies(EIDWT)   342 - 350   2020.1

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    Language:Others   Publishing type:Research paper (other academic)  

    DOI: 10.1007/978-3-030-39746-3_36

  • Implementation of Distributed Processing Using a PC-FPGA Hybrid System. Reviewed

    Keisuke Takano, Tetsuya Oda, Ryo Ozaki, Akira Uejima, Masaki Kohata

    International Conference on Field-Programmable Technology(FPT)   387 - 390   2019.12

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    Language:Others   Publishing type:Research paper (other academic)  

    DOI: 10.1109/ICFPT47387.2019.00074

  • RustからVerilogへのトランスパイラの実装

    高野恵輔, 小田哲也, 小畑正貴

    情報処理学会研究報告(Web)   2018 ( DPS-176 )   2018.9

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    Language:Others  

  • PC-FPGA複合クラスタ上での動的部分再構成による画像処理 (リコンフィギャラブルシステム)

    高野 恵輔, 上嶋 明, 尾崎 亮, 小畑 正貴

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   117 ( 46 )   57 - 62   2017.5

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    Language:Japanese  

  • 汎用FPGAボードによるPC-FPGA複合クラスタシステムの構想 (リコンフィギャラブルシステム)

    高野 恵輔, 上嶋 明, 尾崎 亮, 小畑 正貴

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   116 ( 210 )   39 - 44   2016.9

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    Language:Japanese  

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Books

  • センサフュージョン技術の開発と応用事例

    小畑正貴, 高野恵輔, 上嶋明, 尾崎亮

    技術情報協会  2019.1 

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    Language:Others  

Presentations

  • Design of The Ultra-Low-Power Driven VMM Configurations for μW Scale IoT Devices International conference

    2023.12 

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    Event date: 2023.12

    Language:English   Presentation type:Oral presentation (general)  

    Venue:Singapore University of Technology and Design   Country:Singapore  

    Operating IoT devices by supplying power from an energy harvester and installing AI accelerators in IoT devices are required. Nevertheless, conventionally selected architectures for AI processing require a large amount of power, making it difficult to operate in low-power bands such as IoT devices or even impossible to operate in the first place. Therefore, driving AI accelerators with power that energy harvesters can supply is an issue. However, there has been no past exploration of AI accelerators in the driven of the μW scale. In this paper, we analyze the configuration of Vector Matrix Multiplier, mainly used for AI accelerators, and show the effective configuration for μW scale IoT devices. Using 180nm CMOS to synthesize the four architectures of various sizes, we characterize device performance and analyze energy consumption and circuit area. As a result of the analysis, it shows that the configuration in which all calculations are deployed on the circuit can have the lowest energy consumption. In addition, we found that when there is a limit on circuit area, a configuration in which some calculations are performed in the time domain by lowering the voltage is suitable.

    Other Link: https://xplorestaging.ieee.org/document/10387933

MISC

  • PC-FPGA共有ネットワークにおけるプロセスマイグレーションの実装

    高野恵輔, 尾崎亮, 上嶋明, 小畑正貴

    電子情報通信学会総合大会講演論文集(CD-ROM)   2022.3

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    Language:Japanese  

  • Rustによる安全なハードウェア設計環境の検討

    高野恵輔, 小畑正貴

    情報科学技術フォーラム講演論文集   2018.9

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    Language:Others  

  • 試作PC-FPGA複合クラスタによる並列画像処理

    高野恵輔, 尾崎亮, 上嶋明, 小畑正貴

    電気・情報関連学会中国支部連合大会講演論文集(CD-ROM)   2017.10

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    Language:Others  

  • PC-FPGA複合クラスタを用いた画像処理の実現-単一ボードでの予備実験-

    高野恵輔, 尾崎亮, 上嶋明, 小畑正貴

    電子情報通信学会総合大会講演論文集(CD-ROM)   2017.3

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    Language:Others  

  • 汎用FPGAボードによるPC-FPGA複合クラスタ-相互通信と動的部分再構成-

    高野恵輔, 小畑正貴, 上嶋明, 尾崎亮

    電気・情報関連学会中国支部連合大会講演論文集(CD-ROM)   2016.10

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    Language:Others  

Professional Memberships

  • Information Processing Society of Japan

  • The Institute of Electronics, Information and Communication Engineers

Committee Memberships

  • 電子情報通信学会 リコンフィギャラブルシステム研究会専門委員   専門委員   Domestic

    2024.4 - 2026.3   

Academic Activities

  • TPC member International contribution

    IEEE 16th International Symposium on MCSoC-2023  ( Singapore ) 2023.12

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    Type:Competition, symposium, etc.