| Yamamoto Keisuke | Last modified date：2024.04.19 |
Associate Professor /
Department of Advanced Energy Science and Engineering /
Faculty of Engineering Sciences
Presentations
| 1. | R. Hashimoto, T. Koga, T. Nagano, K. Moto, K. Yamamoto, and T. Sadoh, Effects of Capping Layers on Solid-Phase Crystallization of Sn-Doped Ge Thin Films on Insulators, 14th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.12. |
| 2. | H. Kuwazuru, D. Wang, and K. Yamamoto, Fabrication of a Ge gate stack using plasma irradiation and low-temperature annealing for Ge applications, 14th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.12. |
| 3. | K. Yamamoto, W.-C. Wen, D. Wang, and H. Nakashima, Electrical and Structural Characterization of Thermally Oxidized Yttrium Oxide on Germanium, 14th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.12. |
| 4. | L. Huang, K. Moto, K. Igura, T. Ishiyama, K. Toko, D. Wang, K. Yamamoto, Inversion Mode n-channel TFT Fabricated on Solid-Phase Crystallized Polycrystalline Ge at Low Temperature Improved by Metal Induced Dopant Activation, 14th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.12. |
| 5. | A. Honda, N. Shimizu, Y. J. Feng, K. Yamamoto, S. Shibayama, O. Nakatsuka, and D. Wang , Observation of acceptor-type defect levels using low-temperature Hall effect measurement for GeSn layers fabricated by molecular beam epitaxy, 14th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.12. |
| 6. | R. Loo, A. Akula, C. Porret, D. Wang, K. Yamamoto, T. Sipőcz, Á. Kerekes, A. Merkulov, M. Ayyad, H. Han, O. Richard, A. Impagnatiello, A. Hikavyy, Y. Shimura, Epitaxial SiGe/Si Multi-Stacks for Complementary FET Devices, 14th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.12. |
| 7. | H. Kuwazuru, D. Wang, K. Yamamoto , Low Temperature (~210 °C) Fabrication of Ge MOS Capacitor using Plasma Oxidation and Oxi-Nitridation for the Interlayer Formation, 2023 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES: SCIENCE AND TECHNOLOGY, 2023.10. |
| 8. | Eui Young Jung, Pablo Solís-Fernández, Keisuke Yamamoto, Hiroki Ago, Transferable High-k/Boron Nitride Gate Dielectric for Two-Dimensional Field-Effect Transistors, 2023 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES: SCIENCE AND TECHNOLOGY, 2023.10. |
| 9. | K. Yamamoto, D. Wang, R. Loo, C. Porret, J. Cho, K. Dessein, V. Depauw, Fabrication and Electrical Characterization of Ge-on-Insulator based on Ge-on-Nothing Technology, 2023 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES: SCIENCE AND TECHNOLOGY, 2023.10, Ge-on-Insulator (GOI) is considered to be a necessary structure for novel Ge-based devices. This paper proposes an alternative approach for fabricating GOI based on the Ge-on-Nothing (GeON) template. In this approach, a regular macropore array is formed by lithography and dry etching. These pores close and merge upon annealing, forming a suspended monocrystalline Ge membrane on one buried void. GOI is fabricated by direct bonding of GeON on Si carrier substrates, using an oxide bonding interface, and subsequent detachment. The fabricated GOI shows uniform physical properties as demonstrated using micro-photoluminescence measurements. Its electrical characteristics and cross-sectional structure are superior to those of Smart-CutTM GOI. To demonstrate its application potential, back-gate GOI capacitors and MOSFETs are fabricated. Their characteristics nicely agree with the theoretically calculated one and show typical MOSFET operations, respectively, which indicates promising Ge crystallinity. This method, therefore, shows the potential to provide high-quality GOI for advanced Ge application devices.. |
| 10. | R. Loo, A. Hikavyy, D. Wang, K. Yamamoto, T. Sipőcz, Á. Kerekes, A. Akula, and Y. Shimura, Optical Material Properties of Epitaxial SiGe/Si Multi-Layers Used for Complementary FET Devices, 2023 International Conference on Solid State Device and Materials (SSDM 2023), 2023.09. |
| 11. | T. Koga, T. Nagano, K. Moto, K. Yamamoto, Taizoh Sadoh , High Carrier Mobility of Sn-Doped Ge Thin-Films ( |
| 12. | L. Huang, K. Moto, T. Ishiyama, K. Toko, D. Wang, and K. Yamamoto, Inversion Mode n-channel TFT on Polycrystalline Ge Formed by Solid-Phase Crystallization, 2023 International Conference on Solid State Device and Materials (SSDM 2023), 2023.09. |
| 13. | K. Moto, K. Toko, T. Takayama, T. Ishiyama, K. Yamamoto, Various Metal Contacts on Polycrystalline Ge with Amorphous Interlayer Formed by ZrN Sputter-Deposition, 2023 International Conference on Solid State Device and Materials (SSDM 2023), 2023.09. |
| 14. | K. Yamamoto, W.-C. Wen, D. Wang, and H. Nakashima, Thermally oxidized Yttrium Oxide on Germanium for n-MOS Capacitor and Field-Effect Transistor, 244th ECS meeting, 2023.10, Germanium (Ge) has many exciting material characteristics, such as high carrier mobility and narrow bandgap in the near-infrared range. Thus it is suitable for various applications. A high-quality insulating film on Ge is required to apply Ge to novel electronic devices successfully. It is well known that GeO2 on Ge has good electrical characteristics as a gate insulator or interlayer (IL), similar to SiO2 on Si [1]. Unlike SiO2, however, GeO2 is thermodynamically unstable under atmospheric pressure at typical oxidation temperatures (~400 °C) and volatilizes as GeO [2,3]. Several methods have been developed to suppress GeO volatilization from the surface. For example, transition metals such as yttrium (Y) have been introduced into GeO2. Yttrium (Y)-doped GeO2 has excellent thermal, chemical, and electrical characteristics. In the capacitance–voltage measurement, it shows a low interface state density (Dit) and a narrow hysteresis corresponding to the border trap (BT) density (Nbt) of gate insulators [4]. Based on the above studies, we focused on metal Y deposition with subsequent thermal oxidation as an efficient alternative method to deposit Y-oxide as a gate insulator on Ge. This method has been studied to deposit Y2O3 as a gate insulator on Si [5]. Moreover, metal oxidation has been used to form various gate insulators on Ge, such as Al [6] and Hf [7]. In this study, we expect a capping layer of Y and oxidized Y to suppress GeO volatilization and stabilize the interface. We fabricated and evaluated metal-oxide-semiconductor (MOS) capacitors and MOS field-effect transistors (FETs) with either a thermally oxidized Y or a thermally oxidized Ge oxide layer. The structural analysis found that the insulator was divided into three layers: Y2O3, YGeO3, and GeOx from the top. The oxidation temperature affected only the thickness of the bottom GeOx layer. We found that the Y-oxide gate stack had better electrical characteristics and a lower Dit and Nbt than the thermally oxidized GeOx insulator. In contrast, the Dit–energy distribution and Nbt temperature dependence of the Y-oxide gate insulator were similar to those of the GeOx gate insulator. We examined these observations, including the structural analysis results. We found that thermally oxidized Y had a distinct advantage over thermally oxidized Ge oxide: the possibility of controlling the structure and electrical characteristics of the Ge gate stack, such as the GeOx thickness and the BT signal origin.. |
| 15. | N. Shimizu, Y. Wang, A. Honda, K. Yamamoto, S. Zhang, S. Shibayama, O. Nakatsuka, and D. Wang, N-type characteristics of undoped Ge0.967Sn0.033 fabricated on bulk n-Ge, International Conference on Silicon Epitaxy and Heterostructures and International SiGe Technology and Device Meeting 2023 (ISTDM-ICSI 2023), 2023.05. |
| 16. | K. Moto, K. Toko, T. Takayama, T. Ishiyama, and K. Yamamoto, Control of schottky barrier height at metal/polycrystalline Ge interfaces with fermi-level pinning alleviation, International Conference on Silicon Epitaxy and Heterostructures and International SiGe Technology and Device Meeting 2023 (ISTDM-ICSI 2023), 2023.05. |
| 17. | K. Yamamoto, D. Wang, R. Loo, C. Porret, J. Cho, K. Dessein, and V. Depauw, Evaluation of the physical properties of Ge-on-insulator based on Ge-on-Nothing and layer transfer, International Conference on Silicon Epitaxy and Heterostructures and International SiGe Technology and Device Meeting 2023 (ISTDM-ICSI 2023), 2023.05. |
| 18. | H. Kuwazuru, S. Nasu, D. Wang, and K. Yamamoto, Study on the Performance of Metal S/D Ge n-MOSFET with Recessed Channel Structure, 13th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.01. |
| 19. | L. Huang, K. Moto, T. Ishiyama, K. Toko, D. Wang, and K. Yamamoto, Inversion Mode n-channel TFT on Polycrystalline Ge Formed by Solid-Phase Crystallization, 13th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.01. |
| 20. | K. Moto, K. Yamamoto, and K. Toko, Polycrystalline Thin-Film Transistor Based on Solid-Phase Crystallized Ge and GeSn, 13th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.01. |
| 21. | N. Shimizu, Y. Wang, A. Honda, K. Yamamoto, S. Zhang, S. Shibayama, O. Nakatsuka, and D. Wang, N-type characteristics of undoped GeSn in the low Sn concentration region, 13th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.01. |
| 22. | K. Yamamoto, D. Wang, R. Loo, C. Porret, J. Cho, K. Dessein, and V. Depauw, Ge-on-Insulator from Ge-on-Nothing and Layer Transfer, 13th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2023.01. |
| 23. | K. Moto, K. Toko, T. Takayama, T. Imajo, K. Yamamoto , First Demonstration of Rectifying Schottky Contact on Polycrystalline P-Type Ge Using ZrN Electrode, 2022 International Conference on Solid State Device and Materials (SSDM 2022), 2022.09. |
| 24. | W.-C. Wen, K. Yamamoto, D. Wang, H. Nakashima, Fabrication and Characterization of Ge n-MOS and n-MOSFET with Thermally Oxidized Yttrium Gate Insulator, 9th International Symposium on Control of Semiconductor Interfaces (ISCSI-IX), 2022.09. |
| 25. | T. Takayama, K. Moto, K. Yamamoto, T. Imajo, K. Toko, Fabrication and evaluation of polycrystalline Ge-based thin-film transistors on glass, The 5th International Union of Materials Research Societies International Conference of Young Researchers on Advanced Materials (IUMRS-ICYRAM 2022), 2022.08. |
| 26. | N. Shimizu, Y. Wang, K. Yamamoto, S. Zhang, S. Shibayama, O. Nakatsuka, D. Wang, Electrical characteristics of metal/GeSn contacts in lateral Schottky diodes, The 5th International Union of Materials Research Societies International Conference of Young Researchers on Advanced Materials (IUMRS-ICYRAM 2022), 2022.08. |
| 27. | S. Nasu, T. Matsuo, K. Yamamoto, D. Wang, Fabrication of Ge MOSFET at low temperature (~250°C) for spintronics application, The 5th International Union of Materials Research Societies International Conference of Young Researchers on Advanced Materials (IUMRS-ICYRAM 2022), 2022.08. |
| 28. | K. Yamamoto, T. Matsuo, D. Wang, K. Moto, K. Toko, H. Nakashima, Novel group IV semiconductor materials and devices for beyond Si technology, The 5th International Union of Materials Research Societies International Conference of Young Researchers on Advanced Materials (IUMRS-ICYRAM 2022), 2022.08. |
| 29. | Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Shigeomi Hishiki, Hiroki Uratani, Yoshiki Sakaida, Keisuke Kawamura , Achievement of High Channel Mobility of 3C-SiC n-MOSFET with the Gate Stack Formed at Low Temperature, 2021 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES: SCIENCE AND TECHNOLOGY, 2021.11. |
| 30. | Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Fabrication of Ge-on-Insulator By Epitaxial Growth and Ion-Implanted Exfoliation for Electronics and Opt-Electronics Applications, 240th ECS meeting, 2021.10. |
| 31. | Kenta Moto, Keisuke Yamamoto, Toshifumi Imajo, Takashi Suemasu, Hiroshi Nakashima, Kaoru Toko , Sn Doping Effects on Polycrystalline Germanium Thin-Film Transistors on Glass, 2021 International Conference on Solid State Device and Materials (SSDM 2021), 2021.09. |
| 32. | Keisuke Yamamoto, Kento Iseri, Dong Wang, Hiroshi Nakashima, Low-Temperature Fabrication of Ge MOS Capacitor with Wet Oxidized Yttrium Interlayer, 2021 International Conference on Solid State Device and Materials (SSDM 2021), 2021.09. |
| 33. | Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Schottky Barrier Height Control at Metal/Ge Interface by Insertion of Nitrogen Contained Amorphous Layer, 239th ECS meeting, 2021.05. |
| 34. | Kenta Moto, Keisuke Yamamoto, Takashi Suemasu, Hiroshi Nakashima, Kaoru Toko , Sn Doping Effects in Solid-Phase Crystallized Ge Thin-Film Transistors, PRiME 2020, 2020.10. |
| 35. | Toshifumi Imajo, Kenta Moto, Keisuke Yamamoto, Takashi Suemasu, Hiroshi Nakashima, Kaoru Toko , Underlayer Selection to Improve the Performance of Polycrystalline Ge Thin Film Transistors, PRiME 2020, 2020.10. |
| 36. | Hiroshi Nakashima, Wei-Chen Wen, Keisuke Yamamoto, Dong Wang, Border-Trap Characterization for Ge Gate Stacks with Thin GeOX layer Using Deep-Level Transient Spectroscopy, PRiME 2020, 2020.10. |
| 37. | Noboru Shimizu, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Isotropic Wet Etching and Improving Surface Flatness of Ge for Etchback Ge-on-Insulator Fabrication, PRiME 2020, 2020.10. |
| 38. | Hiroki Kanakogi, Wei-Chen Wen, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Thermally Oxidized Yttrium and Scandium Gate Dielectrics on Germanium with High Interfacial and Film Qualities, 2020 International Conference on Solid State Device and Materials (SSDM 2020), 2020.09. |
| 39. | Wei-Chen Wen, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Study on Position of Border Traps in Al2O3/GeOX/p-Ge Gate Stacks Using Deep-Level Transient Spectroscopy, 8th International Symposium on Control of Semiconductor Interfaces (ISCSI-VIII), 2019.11. |
| 40. | Hiroshi Nakashima, Wei-Chen Wen, Keisuke Yamamoto, Dong Wang, Border-Trap Evaluation for SiO2/GeO2/Ge Gate Stacks Using Deep-Level Transient Spectroscopy, 8th International Symposium on Control of Semiconductor Interfaces (ISCSI-VIII), 2019.11. |
| 41. | Hiroshi Nakashima, Wei-Chen Wen, Keisuke Yamamoto, Dong Wang, Border-Trap Characterization for Ge Gate Stacks Using Deep-Level Transient Spectroscopy , 236th ECS meeting, 2019.10. |
| 42. | Kenta Moto, Keisuke Yamamoto, Takashi Suemasu, Hiroshi Nakashima, Kaoru Toko, Electrical properties of p-channel thin-film transistors fabricated on high-mobility polycrystalline Ge on glass, 2019 International Conference on Solid State Device and Materials (SSDM 2019), 2019.09. |
| 43. | Kento Iseri, Wei-Chen Wen, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima , Low temperature (oC) Fabrication of Ge MOS Structure for Advanced Electronic Devices, 2019 International Conference on Solid State Device and Materials (SSDM 2019), 2019.09. |
| 44. | Ryusei Oka, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Sigeomi Hishiki, Keisuke Kawamura, Demonstration of n-MOSFET operation and charge analysis of SiO2/Al2O3 gate dielectric on (111) oriented 3C-SiC, 2019 International Conference on Solid State Device and Materials (SSDM 2019), 2019.09. |
| 45. | K. Yamamoto, K. Nakae, H. Akamine, D. Wang, H. Nakashima, Md. M. Alam, K. Sawano, Z. Xue, M. Zhang, Z. Di , Conduction Type Control of Ge-on-Insulator: Combination of Smart-Cut and Defect Elimination, 2nd Joint ISTDM / ICSI 2019 Conference 10th International SiGe Technology and Device Meeting (ISTDM) 12th International Conference on Silicon Epitaxy and Heterostructures, 2019.06. |
| 46. | Wei-Chen Wen, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Border Trap Evaluation for Al2O3/GeOX/p-Ge Gate Stacks using Deep-Level Transient Spectroscopy , 2nd Joint ISTDM / ICSI 2019 Conference 10th International SiGe Technology and Device Meeting (ISTDM) 12th International Conference on Silicon Epitaxy and Heterostructures, 2019.06. |
| 47. | Keisuke Yamamoto, Kentaro Akiyama, Kento Iseri, Wei-Chen Wen, Dong Wang, Hiroshi Nakashima , Fabrication of Ge MOS Capacitor with Metal Yttrium Oxidation, 12th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2018.12. |
| 48. | Wei-Chen Wen, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Border trap evaluation using deep-level transient spectroscopy for SiO2/GeO2/Ge gate stacks, 12th International WorkShop on New Group IV Semiconductor Nanoelectronics, 2018.12. |
| 49. | T. Kanashima, H. Furusho, K. Takeyama, H. Nohira, K. Yamamoto, H. Nakashima, Improvement of Interface Properties of Ge-MISFET with Crystalline La2O3 high-k/Ge(111) Gate Stacks by Wet Treatments, 2018 International Conference on Solid State Device and Materials (SSDM 2018), 2018.09. |
| 50. | K. Yamamoto, K. Nakae, D. Wang, H. Nakashima, Z. Xue, M. Zhang, Z. Di, Ambipolar operation of asymmetric Ge Schottky tunneling source field-effect transistor fabricated on Ge-on-Insulator, 2018 International Conference on Solid State Device and Materials (SSDM 2018), 2018.09. |
| 51. | T. Maekura, T. Goto, K. Nakae, K. Yamamoto, H. Nakashima, D. Wang, Fabrication and characterization of asymmetric metal/Ge/metal diodes with Ge-on-Insulator substrate, 2018 International Conference on Solid State Device and Materials (SSDM 2018), 2018.09. |
| 52. | K. Yamamoto, D. Wang, H. Nakashima, S. Hishiki, K. Kawamura, Impact of Al2O3 interlayer for metal-oxide-semiconductor capacitor on (111) oriented 3C-SiC for electronic device application, 2018 International Conference on Solid State Device and Materials (SSDM 2018), 2018.09. |
| 53. | Hiroshi Nakashima, Wei-Chen Wen, Keisuke Yamamoto, Dong Wang, Near-interface border-traps characterization by deep-level transient spectroscopy for GeO2/Ge gate stacks, 11th International Workshop on New Group IV Semiconductor Nanoelectronics, 2018.02. |
| 54. | Hiroshi Nakashima, Hayato Okamoto, Keisuke Yamamoto, Dong Wang, Achievement of Ultralow Contact Resistivity of Metal/n+-Ge Contacts with Zr-N-Ge Amorphous Interlayer, 232nd ECS meeting, 2017.10. |
| 55. | Taisei Sakaguchi, Kentaro Akiyama, Keisuke Yamamoto, Hiroshi Nakashima, Dong Wang, Dependence of Channel Mobility on Substrate Impurity Concentration for Metal Source/Drain Ge MOSFETs, 2017 International Conference on Solid State Device and Materials (SSDM 2017), 2017.09, [URL]. |
| 56. | Wei-Chen Wen, Taisei Sakaguchi, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Characterization of near-interface border-traps in GeO2/Ge gate stacks grown by low and high temperature thermal oxidation using deep-level transient spectroscopy , 2017 International Conference on Solid State Device and Materials (SSDM 2017), 2017.09, [URL], . |
| 57. | Wei-Chen Wen, Taisei Sakaguchi, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Near-interface border-traps characterization by deep-level transient spectroscopy for GeO2/Ge gate stacks, The 10th International Conference on Silicon Epitaxy and Heterostructures (ICSI-10), 2017.05, [URL]. |
| 58. | Takayuki Maekura, Chisato Motoyama, Kentaro Tanaka, Keisuke Yamamoto, Hiroshi Nakashima, Dong Wang, Effect of n-type doping level on direct band gap light emission intensity for asymmetric metal/Ge/metal diodes, The 10th International Conference on Silicon Epitaxy and Heterostructures (ICSI-10), 2017.05, [URL]. |
| 59. | Takayuki Maekura, Chisato Motoyama, Kentaro Tanaka, Keisuke Yamamoto, Hiroshi Nakashima, DONG WANG, Effect of n-type doping level on direct band gap light emission intensity for asymmetric metal/Ge/metal diodes, 10th International Workshop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration", 2017.02. |
| 60. | Keisuke Yamamoto, Hayato Okamoto, DONG WANG, Hiroshi Nakashima, Achievement of Ultralow Contact Resistivity of Metal/Ge Contacts with Zr-N-Ge Amorphous Interlayer, 10th International Workshop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration", 2017.02. |
| 61. | Hiroshi Nakashima, Hayato Okamoto, Keisuke Yamamoto, Dong Wang, Electrical Properties of Metal/Ge Contacts with Zr-N-Ge Amorphous Interlayer, JSPS Core-to Core Program "Atomically Controlled Processsing for Ultralarge Scale Integration", 2016.11. |
| 62. | Hayato Okamoto, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima, Achievement of Ultralow Contact Resistivity of Metal/Ge Contacts with Zr-N-Ge Amorphous Interlayer, 2016 International Conference on Solid State Device and Materials (SSDM 2016), 2016.09. |
| 63. | Kenji Kasahara, Hidenori Higashi, Mario Nakano, Yuta Nagatomi, Keisuke Yamamoto, Hiroshi Nakashima, Kohei Hamaya, Effect of Post Annealing on Hole Mobility of Pseudo-Single-Crystalline Germanium Thin-Film-Transistors on Glass Substrates, 7th International Symposium on Control of Semiconductor Interfaces / International SiGe Technology and Device Meeting, 2016.06, [URL]. |
| 64. | Takeshi Kanashima, Masato Zenitaka, Keisuke Yamamoto, Riku Yamashiro, Hiroshi Nohira, Hiroshi Nakashima, Shinya Yamada, Kohei Hamaya, Improvement of C-V Characteristics in LaYO3/La2O3/Ge(111) MIS Structures, 7th International Symposium on Control of Semiconductor Interfaces / International SiGe Technology and Device Meeting, 2016.06, [URL]. |
| 65. | Keisuke Yamamoto, Hayato Okamoto, DONG WANG, Hiroshi Nakashima, Characterization of Ge Tunnel FET with Metal/Ge Junction, 7th International Symposium on Control of Semiconductor Interfaces / International SiGe Technology and Device Meeting, 2016.06, [URL]. |
| 66. | Yuta Nagatomi, Tomoki Tateyama, Shintaro Tanaka, Keisuke Yamamoto, DONG WANG, Hiroshi Nakashima, Mobility enhancement in Ge p-MOSFET due to introduction of Al atoms in SiO2/GeO2 gate stacks, 7th International Symposium on Control of Semiconductor Interfaces / International SiGe Technology and Device Meeting, 2016.06, [URL]. |
| 67. | Takayuki Maekura, Chisato Motoyama, Keisuke Yamamoto, DONG WANG, Hiroshi Nakashima, Influences of metal/Ge contact and surface passivation on direct band gap light emission and detection for asymmetric metal/Ge/metal diodes, 9th International Workshop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration", 2016.01. |
| 68. | Yuta Nagatomi, Shintaro Tanaka, Tomoki Tateyama, Keisuke Yamamoto, DONG WANG, Hiroshi Nakashima, Mechanism of mobility enhancement in Ge p-MOSFET due to introduction of Al atoms in SiO2/GeO2 gate stacks, 9th International Workshop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration", 2016.01. |
| 69. | Takayuki Maekura, Dong Wang, Keisuke YAMAMOTO, Hiroshi Nakashima, Influences of Metal/Ge Contact and Surface Passivation on Light Emission and Detection for Asymmetric Metal/Ge/Metal Diodes, 2015 International Conference on Solid State Device and Materials (SSDM 2015) , 2015.09. |
| 70. | Shintaro Tanaka, Yuta Nagatomi, Yuichi Nagaoka, Keisuke YAMAMOTO, Dong Wang, Hiroshi Nakashima, PtGe-Source/Drain Ge p-MOSFET with High On/Off Ratio and Low Parasitic Resistance, 2015 International Conference on Solid State Device and Materials (SSDM 2015) , 2015.09. |
| 71. | Dong Wang, Takayuki Maekura, Keisuke Yamamoto, Hiroshi Nakashima, Direct-bandgap Light Emission and Detection at Room Temperature in Bulk-Ge Diodes with HfGe/Ge/TiN Structure, 9th International Conference on Silicon Epitaxy and Heterostructures (ICSI-9), 2015.05, [URL]. |
| 72. | Hiroshi Nakashima, Keisuke Yamamoto, Dong Wang, Masatoshi Mitsuhara, Ryutaro Noguchi, Keisuke Hiidome, Minoru Nishida, Contact Formation for Metal Source/Drain Ge-CMOS, 9th International Conference on Silicon Epitaxy and Heterostructures (ICSI-9), 2015.05, [URL]. |
| 73. | Keisuke Yamamoto, Ryutaro Noguchi, Masatoshi Mitsuhara, Minoru Nishida, Toru Hara, Dong Wang, Hiroshi Nakashima, Barrier Height Modulation for Metal/Ge Contacts with Nitrogen-Contained Amorphous Interlayers, 9th International Conference on Silicon Epitaxy and Heterostructures (ICSI-9), 2015.05, [URL]. |
| 74. | Nakashima Hiroshi, Keisuke Yamamoto, WANG DONG, Mitsuhara Masatoshi, Noguchi Ryutaro, Hiidome Keisuke, Minoru Nishida, Contact properties of group IV metal-nitrides (TiN, ZrN, HfN) on Ge, JSPS Core-to-Core Program Workshop "Atomically Controlled Processing for Ultralarge Scale Integration", 2014.11. |
| 75. | Yuta Nagatomi, Yuichi Nagaoka, Yamamoto Keisuke, DONG WANG, Hiroshi Nakashima, Investigation of Al-PMA Effect on Al2O3/GeOX/Ge Gate Stack, 226th ECS Meeting, 2014.10, [URL]. |
| 76. | Yamamoto Keisuke, DONG WANG, Hiroshi Nakashima, Fermi level pinning alleviation at the TiN, ZrN, and HfN/Ge interfaces, 7th International Silicon-Germanium Technology and Device Meeting (ISTDM 2014), 2014.06, [URL]. |
| 77. | DONG WANG, Sho Kamezawa, Yamamoto Keisuke, Hiroshi Nakashima, Direct band gap electroluminescence from bulk germanium at room temperature using an asymmetric metal/germanium/metal structure , 7th International Silicon-Germanium Technology and Device Meeting (ISTDM 2014), 2014.06, [URL]. |
| 78. | Nagatomi Yuta, Nagaoka Yuichi, Tanaka Shintaro, Keisuke Yamamoto, WANG DONG, Nakashima Hiroshi, Effect of Al post metallization annealing on Al2O3/GeOx/Ge gate stacks , 8th International Workshop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration", 2014.01. |
| 79. | Keisuke Yamamoto, WANG DONG, Nakashima Hiroshi, Noguchi Ryutaro, Nishida Minoru, Mitsuhara Masatoshi, Hara Toru, Electrical Properties of Metal/Ge contacts with Nitrogen-Contained Amorphous Interlayers, 8th International Workshop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration", 2014.01. |
| 80. | Keisuke Yamamoto, WANG DONG, Nakashima Hiroshi, Fabrication of Metal-Nitride/Ge Contacts with Extremely Low Electron Barrier Height and Its Clarification of the Physical Origin, 7th International Workshop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration", 2014.01. |
| 81. | Nakashima Hiroshi, Keisuke Yamamoto, WANG DONG, Fabrication of MOS and Light Emitting Devices Using Contacts with Low Electron and Hole Barrier Heights, 7th International Workshop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration", 2014.01. |
| 82. | Yamamoto Keisuke, DONG WANG, Hiroshi Nakashima, Fabrication of Metal-Nitride/Si Contactswith Low Electron Barrier Height, 224th ECS Meeting, 2013.10, [URL]. |
| 83. | Hiroshi Nakashima, Yamamoto Keisuke, DONG WANG, Development of Metal Source/Drain Ge-CMOS Using TiN/Ge and HfGe/Ge contacts, 224th ECS Meeting, 2013.10, [URL]. |
| 84. | Yamamoto Keisuke, Takahiro Sada, DONG WANG, Hiroshi Nakashima, Metal Source/Drain Ge p-MOSFET with HfGe/Ge Contact, 8th International Conference on Silicon Epitaxy and Heterostructures(ICSI-8) 2013, 2013.06. |
| 85. | Hatayama Kota, Yamamoto Keisuke, DONG WANG, Hiroshi Nakashima, Low temperature fabrication of Ohmic contact for p-type 4H-SiC using Al/Ti/Sn, 6th International Symposium on Control of Semiconductor Interfaces (ISCSI-VI) 2013, 2013.06. |
| 86. | Yamamoto Keisuke, Asakawa Kojiro, DONG WANG, Hiroshi Nakashima, Fabrication of TiN/Si Contact with Low Electron Barrier Height and Its Application to Back-Gate MOSFET, 6th International Symposium on Control of Semiconductor Interfaces (ISCSI-VI) 2013, 2013.06. |
| 87. | DONG WANG, Nagatomi Yuta, Kojima Shuta, Kamezawa Sho, Yamamoto Keisuke, Hiroshi Nakashima, An accurate characterization of metal-insulator-semiconductor interface-state by deep-level transient spectroscopy and its application on Y2O3/Ge gate stacks with ultrathin GeOx interlayer, 8th International Conference on Silicon Epitaxy and Heterostructures(ICSI-8) 2013, 2013.06. |
| 88. | Nakashima Hiroshi, Keisuke Yamamoto, WANG DONG, Contact Formations for Schottky Source/Drain Ge-CMOS, 6th International Workshop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration", 2013.02. |
| 89. | T. Sada, K. Yamamoto, H. Yang, D. Wang, H. Nakashima, High Hole-Mobility Ge p-MOSFET with HfGe Schottky Source/Drain, 2012 International Conference on Solid State Device and Materials (SSDM 2012), 2012.09. |
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