九州大学 研究者情報
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POKHAREL RAMESH KUMAR(ぽかれる らめしゆ くまーる) データ更新日:2019.06.24

教授 /  システム情報科学研究院 I&Eビジョナリー特別部門 http://rfic.ed.kyushu-u.ac.jp/


主な研究テーマ
ポスト5G向けの100GHz帯を超えるCMOS発振器の開発
キーワード:CMOS 発振器、ポスト5G、100GHz, テラヘルツ、位相雑音、低コスト
2018.04~2022.03.
無線電力伝送に関する研究
キーワード:無線電力、効率、小型
2014.05~2020.05.
テレビホワイトスペース用フロントエンドの開発
キーワード:テレビホワイトスペース、CMOS回路
2012.04~2016.03.
センサネットワーク用超低消費電力高性能CMOS送受信機
キーワード:low power, sensor network, CMOS circuits
2013.04~2015.03.
超低消費電力高性能CMOS送受信機
キーワード:CMOS, Ultra low power
2012.04~2013.03.
超低消費電力DA回路の設計・評価
キーワード:超低消費電力, フィボナッチ数列、デジタル・アナログ変換回路
2008.04~2010.03.
(i) マイクロ波伝送線路およびそれを用いた小型受動デバイスの開発
キーワード:マイクロ波回路、電磁界解析、マイクロ波計測
2003.03~2005.03.
IEEE802.11b規格の無線LAN用オンチップCPW線路整合回路付き一体型RFフロント・エンドの開発
キーワード:System LSI,無線LAN,IEEE802.11b,マイクロ波回路
2006.04~2007.03.
0.18 um CMOS プロセスによるADPLL(All-digital phase-locked loop)の開発
キーワード:PLL(phase locked loop), ADPLL(all-digital phase-locked loop),DCO (digitally-controlled oscillator),無線LAN
2007.04~2010.03.
従事しているプロジェクト研究
テラヘルツ波CMOSオンチップ配線に関する研究
2019.04~2021.03, 代表者:ポカレル ラメシュ, システム情報科学研究院, 公益財団電気通信普及財団
公益財団村田学術振興財団.
次世代無線通信用フレキシブルエレクトロニクスに関する研究
2013.06~2016.03, 代表者:ポカレル ラメシュ, システム情報科学研究院, N(社).
ホワイトスペース対応コグニティブ無線用異種集積化リコンフィギュラブルPAの開発
2010.04~2016.03, 代表者:ポカレル ラメシュ, システム情報科学研究院, 科研費
第4世代携帯端末など,移動体通信市場でのモバイル利用の拡大に伴うユビキタスネットワーク情報社会を構築するため、SDR(Softwa re defined radio:ソフトウエア無線)技術を活用したコグニティブ無線の実現が期待されている。
本研究の目標であるチューナブルPAにおいては、これまでワイドバンドCMOS PA がいくつか報告されているが,不要の帯域も増幅してしまうため、近隣チャネルの干渉が起きやすい。本研究では、上記のような問題を解決し、コグニティブ無線用自由にチューニングできる高効率高利得チューナブルPAを開発することを目的としている。.
第5世代準ミリ波様CMOSアナログ回路に関する研究
2016.04~2018.03, 代表者:ポカレル ラメシュ, システム情報科学研究院, 科研費.
ユビキタスネットワーク用小型平面アンテナの開発とトランシーバへの実装に関する研究
2008.04~2012.03, 代表者:吉田 啓二, 九州大学 システム情報科学研究院, 科研費(日本)
本研究の目的は、ユビキタスネットワーク社会実現のためのキーテクノロジーである小型平面アンテナの開発、およびそれをトランシーバに実装することにより超小型トランシーバを開発することである。具体的実現項目は「研究計画・方法」の欄に述べている以下の項目である。(I) 整合回路一体型微小アンテナの設計(II) 指向性を有する整合回路一体型平面型アレイアンテナの設計(III) 広帯域平面型微小アンテナ一体型RFフロントエンドの開発(IV) 三次元実装による裏面遮蔽型アンテナ一体型トランシーバの開発(V) システム検証及びフィールド試験ならびに総合評価.
フィボナッチ数列により最適化された超低消費電力・高速DACの開発
2008.07~2009.03, 代表者:Pokharel、Ramesh Kumar, 九州大学 システム情報科学研究院, 日本
近年ユビキタスネットワーク情報社会の実現のための世界的にも注目されているソフトウエア無線(Software-Defined Radio)に繋がる最先端LSI回路の実現に、低消費電力化は最大の設計問題になっている。従来のデジタル回路では、CML(current mode logic)や3次元実装によりインダクタンス結合やソフトウエアからの最適化も提案されているが、消費電力がもっとも重要になるアナログ回路、例えばDAやAD変換回路の設計には低消費電力は半導体デバイスの微小化に伴い実現されている。本研究では、フィボナッチ数列を応用した新しいトランジスタ最適化手法により、次世代リコンフィギュアラブル無線通信用超低消費電力・高速DA変換回路を開発する。.
超低消費電力・超広帯域12bitリングDCOの開発
2008.04~2010.03, 代表者:Pokharel, Ramesh Kumar, 九州大学 システム情報科学研究院, 日本
本研究の目的は、ユビキタスネットワーク社会実現のためのCognitive Radio(コグニティブ無線)の基盤である超消費電力・超広帯域デジタル制御発信器(DCO)を開発することである。具体的実現項目は「研究計画・方法」の欄に述べている以下の項目である。(I) トランジスタの並列的接続による低消費電力・高速インバータの設計(II) フィボナッチ数列によりトランジスタを最適化した超低消費電力・超広帯域デジタル制御リング発信器(DCO: digital controlled oscillator)の開発・評価(III) (I)(II)で開発した超低消費電力・超広帯域DCOをADPLL(All digital Phase locked loop)に応用.
研究業績
主要著書
1. Sherif Hekal, Ahmed Allam, Adel Abdel-Rahman, Ramesh K. Pokharel , Compact Size Wireless Power Transfer Using Defected Ground Structures, Singapore, 10.1007/978-981-13-8047-1, 1-91, 2019.09, [URL], This book addresses the design challenges in near-field wireless power transfer (WPT) systems, such as high efficiency, compact size, and long transmission range. It presents new low-profile designs for the TX/RX structures using different shapes of defected ground structures (DGS) like (H, semi-H, and spiral-strips DGS). Most near-field WPT systems depend on magnetic resonant coupling (MRC) using 3-D wire loops or helical antennas, which are often bulky. This, in turn, poses technical difficulties in their application in small electronic devices and biomedical implants. To obtain compact structures, printed spiral coils (PSCs) have recently emerged as a candidate for low-profile WPT systems. However, most of the MRC WPT systems that use PSCs have limitations in the maximum achievable efficiency due to the feeding method. Inductive feeding constrains the geometric dimensions of the main transmitting (TX)/receiving (RX) resonators, which do not achieve the maximum achievable unloaded quality factor. This book will be of interest to researchers and professionals working on WPT-related problems..
2. Ramesh Kumar Pokharel, Adel Barakat, Innovative Techniques for 60 GHz On-Chip Antennas on CMOS
Substrate
, (In press), 2017.03, The 60 GHz band has a 7 GHz of bandwidth enabling high data rate wireless communication. Also, it has a short wavelength allowing for passive devices integration into a chip; i.e. fully integrated system-on-chip (SOC) is possible. This chapter features the design, implementation, and measurements of 60 GHz on-chip antennas (OCAs) on Complementary-Metal-Oxide-Semiconductor (CMOS) technology. OCAs are the primary barrier for the SOC solution due to their limited performance. This degraded performance comes from the low resistivity and the high permittivity of the CMOS substrate. We present here two innovative techniques to improve the CMOS OCAs’ performance. The first method utilizes Artificial Magnetic Conductors to shield the OCA electromagnetically from the CMOS substrate. The second methodology employs the PN-Junction properties to create a high resistivity layer. Both approaches target the mitigation of the losses of the CMOS substrate; hence, the radiation performance characteristics of the OCAs are enhanced..
3. Ramesh K. Pokahrel, H. Kanaya, and K. Yoshida, Microwave and Millimeterwave Technologies, Viena, Austria, ISBN 978-953-7619-X-X, IN-TECH Publications, 2010.1 (In Press)., 2010.01, [URL].
主要原著論文
1. Adel Barakat, Kuniaki Yoshitomi, Ramesh Pokharel, Design and Implementation of Dual-Mode Inductors for Dual-Band Wireless Power Transfer Systems, IEEE Transactions on Circuits and Systems II: Express Briefs, 10.1109/TCSII.2018.2883671, 2018.12, [URL], We propose a dual-band wireless power transfer (WPT) system employing a dual-mode inductor. The dual-mode inductor is possible through enforcing a self-resonance condition by loading an inductor in series by a tank circuit. In return, two distinct resonances are achieved, simultaneously, utilizing a single compensation capacitor as the inductance of the dual-mode inductor appears with a smaller value after its self-resonance. Also, by maintaining the same mutual coupling, the coupling coefficient becomes larger at the higher resonance, which allows for the employment of the same source/load admittance inversion network to achieve maximum power transfer at both of the operating frequency bands, concurrently. We verify the operation by fabricating a dual-band WPT system, which shows measured efficiencies of 70% and 69% at 90.3 MHz and 138.8 MHz, correspondingly. The size of the WPT system is 50 50 mm2 and has a transfer distance of 40 mm..
2. Hamed Mosalam, A. Allam, Hongting Jia, A. B. Abdel-Rahman, Ramesh Pokharel, High Efficiency and Small Group Delay Variations 0.18-μ m CMOS UWB Power Amplifier, IEEE Transactions on Circuits and Systems II: Express Briefs, 10.1109/TCSII.2018.2870165, 66, 4, 592-596, 2019.04, [URL], A new staggered tuning technique, by optimizing the inter-stage matching circuit, is proposed to realize a power amplifier (PA) with small group delay (GD) variations and excellent gain flatness across the full bandwidth of ultra-wideband (UWB) system. The proposed PA consists of two stages where the first stage is constructed by a current-reuse with shunt RC feedback topology to realize gain flatness and low power consumption. The design is implemented in 0.18 μ m commentary metal-oxide semiconductor (CMOS) technology, fabricated, and tested. The proposed PA has a measured power gain (|S
21
|) of 11.5 ± 0.7 dB, maximum power-added efficiency (PAE) of 26% and an output 1-dB compression point of 9 dBm, respectively, and this is the maximum PAE among CMOS PAs that cover the full bandwidth of UWB system. Besides, the PA has a small GD variations of ± 68 ps which is the lowest till date..
3. Anwer Sayed Abd El-Hameed, Adel Barakat, Adel B. Abdel-Rahman, Ahmed Allam, Ramesh K. Pokharel, Design of Low-Loss Coplanar Transmission Lines Using Distributed Loading for Millimeter-Wave Power Divider/Combiner Applications in 0.18-μm CMOS Technology, IEEE Transactions on Microwave Theory and Techniques, 10.1109/TMTT.2018.2873381, 66, 12, 5221-5229, 2018.12, [URL], This paper presents a new type of a low-loss miniaturized coplanar-waveguide (CPW) transmission line (TL) by employing distributed loading, capacitors and inductors, in 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology. The capacitors are realized by vertical parallel plates made of vias, and a group of open stubs inserted to the signal line, whereas the inductors are realized by high impedance lines. Then, the proposed CPW-TL is employed to design a miniaturized millimeter wave ultra-wideband low-loss Wilkinson power divider/combiner (WPD/C). The proposed distributed loading results in reducing each WPD/C arm length by more than 50% without changing its characteristic impedance and insertion loss (IL). The design is fabricated in 0.18-μm CMOS technology and tested. The measured results show a wideband performance from dc to 67 GHz with 1-dB IL and isolation greater than 15 dB from 36 to 67 GHz. In addition, the fabricated WPD/C achieves an excellent amplitude imbalance and phase imbalance of less than 0.16 dB and 0.45°, respectively. The core chip size is 336 × 165 μm
2
, which is almost 32.8% compact compared to the recently proposed WPD in the same technology..
4. Elsayed Elsaidy, Adel Barakat, Member, Adel B. Abdel, Rahman, Ahmed Allam, and Ramesh K. Pokharel, Ultra Compact 60 GHz Tapped Line Combline BPF with Two Transmission Zeros Using Defected Ground Structures, IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, 1-7, 2018.12, In this paper, we propose a compact on-chip 60 GHz
band-pass filter (BPF) in Complementary Metal Oxide Semiconductor (CMOS) Technology. This CMOS-BPF employs a tapped-line
Combline configuration with folding and overlapping to achieve a compact size. The Combline BPF is realizable with
low insertion loss (IL) due to the capacitive loading, which reduces the physical length of the resonators and in consequence reduce
the resulting attenuation. Finally, defected ground slots are implemented in the ground plane under the coupled arms for an
additional enhancement of the performance and more size compactness. The measured IL and return loss of the fabricated
prototype BPF are 3.2 dB and
31 dB, respectively at a center
frequency of 59 GHz with a 14 GHz of bandwidth. The chip area
including measurements pads is 189.5 µm × 354.9 µm (0.01×𝝀𝒈𝟐)
which is almost 50% compact compared to that of the smallest
BPF so far proposed in same technology.
5. Adel Barakat, Kuniaki Yoshitomi, Ramesh Pokharel, Design Approach for Efficient Wireless Power Transfer Systems during Lateral Misalignment, IEEE Transactions on Microwave Theory and Techniques, 10.1109/TMTT.2018.2852661, 66, 9, 4170-4177, 2018.09, [URL], This paper methodizes efficiency improvement during lateral misalignment for the wireless power transfer (WPT) system using two coupled semielliptic defected ground structure (DGS) resonators. We design the WPT system using a scaled value of the available mutual coupling between the resonators at perfect alignment. This scaled mutual coupling value enforces over-coupling regime, and the WPT efficiency is lower than the peak one. Then, during lateral misalignment, WPT efficiency improves until it peaks at critical coupling. Next, with further misalignment, the efficiency drops as the system enters loose coupling regime. The proposed method consists of two steps. First, we derive an analytical approach to determine the scaled mutual coupling value for efficiency design during lateral misalignment, and second, we improve the maximum obtainable efficiency by careful designing of the DGS structures' profile. We verify the proposed method by implementing the WPT system at 300 MHz, which shows a peak efficiency of 80% for a size Do × Do = 40 × 40 mm2 with a transfer distance d = Do. During misalignment, the efficiency is higher than 50% for a lateral shift up to ±0.75 Do..
6. Adel Barakat, Kuniaki Yoshitomi and Ramesh K. Pokharel, Design Approach for Efficient Wireless Power Transfer Systems during Lateral Misalignment, IEEE Transactions on Microwave Theory and Techniques, (In press), 2018.12, [URL], This paper methodizes the efficiency improvement during lateral misalignment for the wireless power transfer (WPT) system using two coupled semi-elliptic defected ground structure (DGS) resonators. We design the WPT system using a scaled value of the available mutual coupling between the resonators at perfect alignment. This scaled mutual coupling value enforces over-coupling regime, and the WPT efficiency is lower than the peak one. Then, during lateral misalignment, WPT efficiency improves until it peaks at critical coupling. Next, with further misalignment, the efficiency drops as the system enters loose coupling regime. The proposed method consists of two steps. First, we derive an analytical approach to determine the scaled mutual coupling value for the efficiency design during lateral misalignment, and second, we improve the maximum obtainable efficiency by a careful designing of the DGS structures’ profile. We verify the proposed method by implementing the WPT system at 300 MHz, which shows a peak efficiency of 80% for a size Do × Do = 40 × 40 mm2 with a transfer distance d = Do. During misalignment, the efficiency is higher than 50% for a lateral shift up to ±0.75 Do..
7. Hany A. Atallah(その他), Adel B. Abdel-Rahman(その他, Kuniaki Yoshitomi, and Ramesh K. Pokharel , Design of compact frequency agile filter-antenna using reconfigurable ring resonator bandpass filter for future cognitive radios, International Journal of Microwave and Wireless Technologies, DOI: 10.1017/S1759078717001556, 83, 22-31, 2018.01, [URL], In this paper, a new miniaturized frequency agile filter-antenna with a wide reconfigurable frequency band is proposed for interweave cognitive radios (CRs). A tunable bandpass filter (BPF) composed of a symmetrical ring resonator is cascaded to the feed line of an ultra-wideband planar antenna. The structure of the proposed ring resonator BPF is simple and compact so that the total size of the proposed filter-antenna is smaller than that of a conventional system made of a separate antenna and BPF. The reconfigurability of the proposed filter-antenna is achieved by changing the operating frequency of the BPF by loading the ring resonator with a single varactor diode at its center. The fabricated prototype has successfully achieved a wide operational bandwidth of 1.43 GHz which covers continuous narrow bands from 4.65 to 6.08 GHz. Moreover, the operating tunable narrow bands have stable radiation characteristics. Good agreement between measurement and simulation results is demonstrated..
8. Fairus Tahar, Adel Barakat, Redzuan Saad, Kuniaki Yoshitomi, Ramesh Pokharel, Dual-Band Defected Ground Structures Wireless Power Transfer System with Independent External and Inter Resonator Coupling, IEEE Transactions on Circuits and Systems II: Express Briefs, 10.1109/TCSII.2017.2740401, 64, 12, 1372-1376, 2017.12, [URL], This brief proposes a design methodology based on the admittance (J-) inverters for a dual-band wireless power transfer (WPT) system that employs two cascaded circulars defected ground structure (DGS) resonators with different capacitive loading to guarantee distinct resonances. A single microstrip line excites the two DGSs, and when two DGS resonators are coupled back to back, it transforms to a dual band pass filter leading to wireless power transfer at both bands. Each of the DGS resonators has independent coupling. Thus, the realized J-Inverters are designed independently. Also, we employ a single stub for the matching. This stub appears with a different length according to the operating frequency; hence, an independent external coupling is achieved at both frequencies. A compact size of 30 mm × 15 mm is fabricated achieving a WPT efficiency of more than 71% at a power transfer distance of 16 mm for both bands (0.3 GHz and 0.7 GHz)..
9. Islam Mansour, Mohammed Abou Alalaa, Ahmed Allam(その他), Adel B. Abdel-Rahman(その他), Mohammed Abo-Zahhad(その他), Ramesh Pokharel, Dual Band VCO based on High Quality factor Switched Interdigital Resonator for Ku band using 180 nm CMOS Technology, IEEE Transactions on Circuits and Systems II: Express Briefs, 10.1109/TCSII.2018.2817499, 2018.03, [URL], A dual band and low phase noise Ku-band voltage-controlled oscillator (VCO) using 180 nm CMOS technology is presented in this brief. The proposed VCO employs a switched notch filter that can operate in the low and high band depends on the state of nmos transistor and has a quality factor that is higher than that of a conventional inductor-capacitor (LC) resonator. The proposed resonator doubles the quality factor compared to LC in the technology and reduces the total die area. The first band is realized by the switched interdigital resonator when nmos transistor is in the off state. Furthermore, the second band is realized by turning nmos transistor to the on state which is located between two fingers in the proposed resonator. The chip is implemented in 180nm CMOS technology, and found that the proposed VCO operates from 15.5 16.7Hz (low band) and 16.6 17.4 GHz (high band). At 1.8 V power supply, the power consumption of the oscillator core is 5.4mW and 7.2mW in the low and high-frequency bands respectively. The measured phase noise is –107 dBc/Hz at 1MHz offset from 16.7 GHz carrier frequency..
10. #Ruibing Dong, Haruichi Kanaya, Ramesh Pokharel, A CMOS ultrawideband pulse generator for 3-5 GHz applications, IEEE Microwave and Wireless Components Letters, 10.1109/LMWC.2017.2701306, 27, 6, 584-586, 2017.06, [URL], A low-power ultrawideband (UWB) pulse generator based on pulsed oscillator architecture for 3-5 GHz applications is proposed. The pulsed oscillator is improved, so it realizes binary phase shift keying (BPSK) modulation. Unlike ON-OFF keying or pulse-position modulation (PPM), BPSK can scramble the spectrum, so it can be used in high pulse rate applications without having spectral line problem. The signal structure in this design is burst mode of PPM+BPSK. The proposed UWB pulse generator was successfully implemented on 0.18-μm CMOS technology. The peak-to-peak amplitude of output pulse is about 220 mV with 50-ω load, the maximum power consumption is 4 mW at a raw data rate of 7.8 Mbps and the energy consumption is 32 pJ/pulse at a pulse rate of 125 Mpulses/s..
11. Anwer S.Abd El-Hameed, Adel Barakat, Adel B. Abdel-Rahman(その他), Ahmed Allam(その他), Ramesh Pokharel, Ultracompact 60-GHz CMOS BPF Employing Broadside-Coupled Open-Loop Resonators, IEEE Microwave and Wireless Components Letters, 10.1109/LMWC.2017.2734771, 27, 9, 818-820, 2017.09, [URL], This letter presents a 60-GHz ultracompact on-chip bandpass filter (BPF). The designed filter is based on a unique structure, which consists of two overlapped broadside-coupled open-loop resonators, achieving a high level of miniaturization. Moreover, each resonator is loaded by a metal-insulator-metal capacitor to get further miniaturization. Defected ground structure pattern is constructed under the filter structure to enhance the insertion loss (IL). This BPF is designed and fabricated using a standard 0.18- μ complementary metal-oxide-semiconductor technology for millimeter-wave applications. The fabricated BPF chip size is 240 × 225-μ 2 including pads. The measured results agree well with the simulation ones and show that the BPF has an IL of 3.3 dB at 59.5-GHz center frequency, and a bandwidth of 12.9 GHz..
12. Guoqiang Zhang, Awinash Anand, Kousuke Hikichi(その他), Shuji Tanaka(その他), Masayoshi Esashi(その他), Ken Ya Hashimoto(その他), Shinji Taniguchi(その他), Ramesh Pokharel, A 1.9 GHz low-phase-noise complementary cross-coupled FBAR-VCO without additional voltage headroom in 0.18 μm CMOS technology, IEICE Transactions on Electronics, 10.1587/transele.E100.C.363, E100C, 4, 363-369, 2017.04, [URL], A 1.9 GHz film bulk acoustic resonator (FBAR)-based low-phase-noise complementary cross-coupled voltage-controlled oscillator (VCO) is presented. The FBAR-VCO is designed and fabricated in 0.18 μ m CMOS process. The DC latch and the low frequency instability are resolved by employing the NMOS source coupling capacitor and the DC blocked cross-coupled pairs. Since no additional voltage headroom is required, the proposed FBAR-VCO can be operated at a low power supply voltage of 1.1 V with a wide voltage swing of 0.9 V. An effective phase noise optimization is realized by a reasonable trade-off between the output resistance and the trans-conductance of the cross-coupled pairs. The measured performance shows the proposed FBAR-VCO achieves a phase noise of-148 dBc/Hz at 1 MHz offset with a figure of merit (FoM) of-211.6 dB..
13. Nusrat Jahan, Siti Amalina Enche Ab Rahim, Adel Barakat, Takana Kaho, Ramesh Pokharel, Design and Application of Virtual Inductance of Square-Shaped Defected Ground Structure in 0.18-$\mu \text{m}$ CMOS Technology, IEEE Journal of the Electron Devices Society, 10.1109/JEDS.2017.2728686, 5, 5, 299-305, 2017.09, [URL], This paper investigates a possibility of application of a virtual inductor realized by an integrated defected ground structure (DGS) to design a front-end circuit in CMOS technology. Two types of DGS are analyzed and found that the inductance realized by a square-shaped DGS achieves smaller size and higher quality factor than an H-shaped DGS. Then, a 15-GHz low phase noise voltage-controlled oscillator (VCO) employing the proposed square-shaped DGS in 0.18-$\mu \text{m}$ 1P6M CMOS technology is designed. The fabricated VCO operates from 15.2 to 16.12 GHz and consumes 5-mW power. The measured phase noise is-132.08 dBc/Hz at 10-MHz offset frequency, and this results in the figure of merit (FoM) and FoM taking account of the area to be 189.1 and 199.9 dB, respectively..
14. F. Tahar, R. Saad, A. Barakat, Ramesh Pokharel, 1.06 FoM and Compact Wireless Power Transfer System Using Rectangular Defected Ground Structure Resonators, IEEE Microwave and Wireless Components Letters, 10.1109/LMWC.2017.2750032, 27, 11, 1025-1027, 2017.11, [URL], This letter proposes a wireless power transfer (WPT) system using coplanar waveguide fed rectangular defected ground structure (DGS) resonators. One of the advantages of rectangular DGS resonator is that it has higher quality (Q-) and coupling (K-) factor compared to the H-shape or semi-H-shape DGS resonators. When two DGS resonators are coupled back-to-back, it transforms to a bandpass filter with tight coupling, resulting in the transfer of power wirelessly. The fabricated WPT system of size 35.8 mm × 20 mm achieves, for the first time, a figure of merit of more than one at a WPT distance from 40 to 44 mm..
15. Nusrat Jahan, Siti Amalina Enche Ab Rahim, Hamed Mosalam, Adel Barakat, Takana Kaho, Ramesh Pokharel, 22-GHz-Band Oscillator Using Integrated H-Shape Defected Ground Structure Resonator in 0.18-μ m CMOS Technology, IEEE Microwave and Wireless Components Letters, 10.1109/LMWC.2018.2801031, 28, 3, 233-235, 2018.03, [URL], A novel 22-GHz-band oscillator using an integrated defected ground structure (DGS) resonator is presented for quasi-millimeter waveband applications. The DGS is etched on the first metal layer (M1) below a 50-Ω microstrip line on the top metal layer (M6) of 0.18-μm one-poly six-metal (1P6M) complementary metal-oxide-semiconductor (CMOS) technology. The proposed oscillator is fabricated using 0.18-μm CMOS technology, and the measured carrier frequency and phase noise are 22.88 GHz and-129.21 dBc/Hz (-108.05 dBc/Hz) at 10-MHz (1 MHz) offset frequency, respectively. The power dissipation is 6 mW that results in a figure of merit to be-188.8 dB. As the DGS resonator could be designed at any high frequency, it may give an alternative design approach of high performance voltage controlled oscillator and frequency synthesizers at K-band and beyond, thus alleviates the problem of self-resonance that a spiral inductor usually encounters at higher frequency..
16. POKHAREL RAMESH KUMAR, Class-C architecture for cross-coupled FBAR oscillator to further improve phase noise, IEICE Electronics Express, 10.1587/elex.14.20170056, 14, 5, 1-5, 2017.03, [URL], In this letter, a class-C architecture for an oscillator employing
film bulk acoustic resonator (FBAR) is presented to improve the phase noise
significantly in 1/f 3 region. The advantages offers by class-C operation are
exploited in order to reduce the noise contributed by the current-source
transistor in cross-coupled topology. An adaptive biasing circuit is used in
order to ensure the oscillation start-up. The post-layout simulation incorporating
all parasitic and representing FBAR by modified Butterworth
Van Dyke (MBVD) model illustrates the phase noise improvement by
17 dBc/Hz at 100 kHz offset of a 1.9 GHz carrier compared to the FBAR
based cross-coupled topology presented by the authors [1].
17. Mohamed Ali, Ahmed Allam, Adel B. Abdel-Rahman, Ramesh Kumar Pokharel, Design of Dual Band Microstrip Antenna with Enhanced Gain for Energy Harvesting Applications, IEEE Antennas and Wireless Propagation Letters, 0.1109/LAWP.2017.2654353, 2017.01, [URL], In this paper, a dual band circular patch antenna is introduced. The antenna consists of a circular patch with a direct feed through microstrip feed line, that designed to radiate at 2.45 GHz with fractional bandwidth of 4.5%. A circular slot is inserted into the ground plane that radiates by capacitive coupling between the patch and the ground plane. This slot radiates at 1.95 GHz with fractional impedance bandwidth of 5%. The antenna achieves good radiation characteristics by inserting a reflecting plane at optimum position behind it. The antenna has gain of 8.3 and 7.8 dBi at 1.95 and 2.45 GHz, respectively. This antenna is proposed for the rectenna; then it is designed to direct the main beam in a certain direction by increasing Front to Back (F/B) ratio with low cross polarization levels by using Defected Reflector Structure (DRS) in reflecting plane. The equivalent circuit of the proposed antenna is introduced to model the electrical behavior of the antenna. The proposed antenna can be used to harvest the energy from Wi-fi and widely spread mobile networks. The proposed antenna was designed using CST Microwave Studio. The simulated and measured results show good agreement..
18. Hamed Mosalam, Ahmed Allam, Hongting Jia, Adel Abdelrahman, Ramesh Kumar Pokharel, A 12 to 24 GHz High Efficiency Fully Integrated 0.18 μm CMOS Power
Amplifier, The Institute of Electronics, Information and Communication Engineers, 13, 14, 20160551, 0160551, 2016.10, This letter presents a high efficiency, and small group delay variations 12–24GHz
fully-integrated CMOS power amplifier (PA) for quasi-millimeter wave applications.
Maximizing the power added efficiency (PAE), and minimizing the group delay variations in
a wideband frequency range are achieved by optimizing the on-chip input, output, and inter-
stage matching circuits. In addition, stagger tuning is employed for realizing excellent gain
flatness. A two-stage CMOS PA using the proposed methodology is designed and ....
19. Hekal Sherif, Adel Barakat, Ahmed Allam, Adel B. Abdel-Rahman, Hongting Jia, Ramesh Kumar Pokharel, A Novel Technique for Compact Size Wireless Power Transfer
Applications Using Defected Ground Structures, IEEE Transactions on Microwave Theory and Techniques., 10.1109/TMTT.2016.2618919, 65, 2, 591-599-599, 2017.02, [URL], This paper presents a novel technique for high efficiency and compact size wireless power transfer (WPT) systems. These systems are based on coupled defected ground structure (DGS) resonators. Two types of DGSs (H-shape and semi-H-shape) are proposed. The semi-H-shaped DGS realizes larger inductance value, and this results in
higherWPT efficiency. Instead of using an inductive-fed resonant coupling, we propose
capacitive-fed resonant coupling, which reduces the design complexity and enhances the.
20. Sherif Hekel, Adel Barakat, Ahmed Allam, Adel B. Adel-Rahman, Hongting Jia, Ramesh Kumar Pokharel, Compact Wireless Power Transfer System Using Defected Ground Bandstop Filters, IEEE Microwave and Wireless Components Letters, 10.1109/LMWC.2016.2601300, 99, 10, 2016.10, This letter presents a new design for wireless power transfer (WPT) applications using two coupled bandstop filters (BSF). The stopband is created by etching a defected structure on the ground plane, and the power is transferred through electromagnetic (EM) resonant coupling when the two BSFs are coupled back to back. An equivalent circuit model of the proposed WPT system is extracted. Verification of the proposed design is performed through a good agreement between the EM simulation, circuit simulation, and measurement results. The proposed system achieves a measured WPT efficiency of 68.5% at a transmission distance of 50 mm using a compact size (40 x 40mm²). This results in a figure of merit of the proposed system to be 0.856 and the ratio of transmission distance/lateral size is 1.25 that is the highest among the WPT systems proposed so far using planar structures..
21. Nessim Mahmoud, Adel Barakat, Adel B. Abdel-Rahman, Ahmed Allam, Ramesh Kumar Pokharel, Compact Size On-Chip 60 GHz H-Shaped Resonator BPF, IEEE Microwave and Wireless Components Letters, 10.1109/LMWC.2016.2597219, 26, 9, 681-683, 2016.09.
22. Adel Barakat, Ahmed Allam, Ramesh Kumar Pokharel, 60 GHz CMOS Circular Patch Antenna-on-Chip, Microwave Journal, 60, 2, 90-100, 2017.02, [URL], This article presents a 60 GHz circular patch Antenna-on-Chip (AoC) on asymmetric Artificial Magnetic Conductor (AMC) designed and fabricated using the TSMC 0.18 pm CMOS process. An AMC plane allows a positive reflection coefficient within the bandwidth of interest so incident and reflected waves are in phase. At the AMC frequency o f operation, a high impedance is generated which reduces surface waves and thus enhances gain. At first, circular AoC performance is enhanced using a square AMC. However, square AMC cells suffer from discontinuities that affect performance when using lengthy feed lines to connect the AoC to a front-end circuit. To overcome this problem, an asymmetric rectangular (R-AMC) is employed. A modified asymmetric AMC is used with a circular AoC for further gain enhancement. The area of the fabricated design is only 1715 μm × 710 μm. Measured ∣S11∣, gain and radiation patterns are reported.
23. Adel Barakat, Ramesh Kumar Pokharel, 60 GHz on-chip mixed coupled BPF with H-shaped defected ground structures, Electronics Letters, 10.1049/el.2015.4465, 2016.03, [URL], A 60 GHz miniaturised, low loss on-chip bandpass filter (BPF) based on open-loop
resonators is presented. Overlapping of the BPF's resonators leads to miniaturisation and
introduces a mixed coupling configuration..
24. Ramesh Kumar Pokharel, Performance Analysis of Multicode OCDM Networks Supporting Elastic Transmission With QoS Differentiation, IEEE TRANSACTIONS ON COMMUNICATIONS, 10.1109/TCOMM.2015.2512922, 64, 2, 741-752, 2016.02, [URL], A multicode optical code-division multiplexing (OCDM) is proposed to support the dynamic changes in the requested traffic demand in OCDM networks by adapting the number of allocated codes according to the requested transmission rate..
25. Hany A. Atallah, Adel B. Abdel-Rahman, Kuniaki Yoshitomi, Ramesh Kumar Pokharel, Compact frequency reconfigurable filtennas using varactor loaded T-shaped and H-shaped resonators for cognitive radio applications, IET Microwaves Antennas & Propagation, 10.1049/iet-map.2015.070, 4, 4, 2016.03, [URL], In this study, novel compact filtennas with large tunable frequency band are proposed for cognitive radio (CR) applications. .
26. ADEL TAWFIK MOHAMED MOHAMED BARAKAT, Hala Elsadek, Adel Abdelrahma, POKHAREL RAMESH KUMAR, Takana Kaho, Improved Gain 60 GHz CMOS Antenna with N-well Grid, IEICE Electronics Express (In press), 2016.03, [URL], This paper presents a novel technique to enhance Antenna-on-Chip gain by introducing a high resistivity layer below it. Instead of using the costly ion implantation method to increase resistivity, the N-well that is available in the standard CMOS process is used. A distributed grid structure of N-well on P-type substrate is designed such that the P and N semiconductors types are fully depleted forming a layer with high resistivity. By an electromagnetic simulation, the using depletion layers enhance the antenna gain and radiation efficiency without increasing the occupied area. The simulated and measured |S11| are in fair agreement. The measured gain is –1.5 dBi at 66 GHz..
27. Sho Asano, ANAND AWINASH, Ramesh Kumar Pokharel, Hideki Hirano, Shuji Tanaka, Monolithic Integration of BST Thin Film Varactors and Au Electroplated Thick Film Inductors above IC, 電気学会論文誌E(センサ・マイクロマシン部門誌) , 138, 8, 323-329, 2015.08, [URL], This paper presents an integration process of barium strontium titanate (BST) thin film varactors and Au thick film inductors above an integrated circuit (IC) by film transfer technology and Au electroplating process. A high-quality BST film grown on a Si substrate at 650°C was patterned into MIM (Metal-Insulator-Metal) structures, and transferred to an IC substrate at 270°C by BCB (Benzocyclobutene) polymer bonding and Si lost wafer process. Thick film inductors fabricated by Au electroplating were also integrated above the IC substrate to realize high Q factor. The capacitance tunability of the BST varactors did not decrease by transfer process. The Q factor of the fabricated inductor was higher than that of conventional inductors on IC chips. The resonant frequency of an LC series resonance circuit composed of the transferred BST varactor and the Au electroplated inductor changed from 0.76 GHz to 1.19 GHz by applying a DC bias voltage of 8 V to the BST varactor. Monolithic integration technology developed in this research will be useful for tunable radio frequency circuits like tunable power amplifiers..
28. Ahmed E. Farghal, Hossam M. H. Shalaby, Kazutoshi Kato, Ramesh Kumar Pokharel, Optical Code-Division Multiplexing (OCDM) Networks Adopting Code-Shift Keying/Overlapping PPM Signaling: Proposal and Performance Analysis, IEEE Transactions on Communications , 63, 10, 3779 -3788, 2015.10, Optical code-division multiplexing (OCDM) systems use short pulses compared with bit-duration to achieve high transmission rate. The use of short pulses poses several problems as a result of group velocity dispersion (GVD), intersymbol interference (ISI) (due to avalanche photodiode (APD) buildup time), and receivers limited bandwidth. In this paper, an OCDM system employing code-shift keying (CSK) and overlapping pulse-position modulation (OPPM) signaling is proposed and theoretically investigated. By using CSK while maintaining same data rate, the chip duration can be increased to counteract the GVD effect in 2D OCDM systems. Moreover, by increasing the chip duration, the chip rate is decreased and the stringent requirement on receiver bandwidth is relaxed. In addition, using overlapping property in OPPM allows for further chip duration increase. We consider using correlation receivers with hard-limiters and APDs at the receiver side. The bit error probability (BEP) of the proposed system is derived taking into account the impacts of APD noise, thermal noise, GVD, ISI, and multiple-access interference (MAI). A performance comparison between OOK-, PPM-, OPPM-OCDM and the proposed system is carried out. Our results reveal that the use of CSK/OPPM-OCDM with data rate constraint allows the reduction of MAI, GVD and ISI effects with improved spectral efficiency..
29. Adel Barakat, Ramesh Kumar Pokharel, Miniaturized low loss 60 GHz CMOS mixed coupled BPF with patterned ground shield, Microwave and Optical Technology Letters, 58, 3, 697-699, 2016.01, This letter presents a miniaturized low loss mixed coupled on-chip band-pass
filter using overlapped open loop ring resonators and using patterned ground shields. The
fabricated prototype shows an insertion loss of 3.7 dB, a return loss> 20 dB, a bandwidth of
13 GHz, and a chip size of 700 μm× 450 μm..
30. Lechang Liu, POKHAREL RAMESH KUMAR, Compact Modeling of Phase-Locked Loop Frequency Synthesizer for Transient Phase Noise and Jitter Simulation, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 10.1109/TCAD.2014.2354291, 35, 1, 166-170, 2016.01, [URL], Compact modeling of phase-locked loop (PLL) frequency synthesizer is proposed to reduce transient phase noise and jitter simulation time. Conventional small-signal noise assumption based frequency-domain simulation approach produces inaccurate results for nonlinear PLLs. Accurate analysis of nonlinear PLL are possible through time-domain, or transient noise simulation but time-domain simulation is computationintensive and time-consuming. This research presents a practical solution for transient phase noise and jitter analysis using compact modeling techniques. It features an autoregressive moving average process modeled voltage-controlled oscillator with fractional calculus and wavelet transform for phase noise decomposition and reconstruction, thereby reducing the phase noise and jitter simulation time to 25.8% of the transistor-level simulation with 0.4dB@1MHz phase noise error and 0.3ps long-term jitter error for a 2GHz PLL frequency synthesizer in a 65nm CMOS process.
with a lookup table for nonlinearity compensation and a radial basis
function neural network for the voltage-controlled oscillator with nonlinear
frequency-voltage relationship, thereby reducing the post-layout
simulation time to 26% of the original circuits with the accuracy of 93%..
31. Adel Barakat, A. B. Adel, Ahmed Allam, POKHAREL RAMESH KUMAR, 60 GHz CMOS Circular Patch AoC Modified Asymmetric AMC, Microwave Journals, (In Press) (採録決定), 2015.12, This paper presents a small size 60 GHz circular Antenna-on-Chip (AoC) designed and fabricated using 0.18 µm Taiwan Semiconductor Manufacturing Company (TSMC) Complementary Metal Oxide Semiconductor (CMOS) process. AoC performance is enhanced using Artificial Magnetic Conductor (AMC) because the AMC allows a positive reflection coefficient at the bandwidth of interest so incident and reflected waves are in phase. To illustrate this, several shapes of symmetric AMC have been investigated and the performances employed in the circular AoC are then compared, and it is found that symmetric AMC cells suffer from discontinuity which affects the performance in case of using lengthy feed lines to connect AoC to a front-end circuit. To overcome this problem, asymmetric AMC is proposed and implemented using 0.18 CMOS process with operating bandwidth from 50 to 67 GHz. The area of AoC including the asymmetric AMC is only 1715 µm by 710 µm.
32. POKHAREL RAMESH KUMAR, G. Zhang, S. A. Enche Ab Rahim, Design of High Performance of Oscillator using Film Bulk Acoustic Resonator, 2014 Korea-Japan Microwave Workship, 1-2, 2014.12.
33. W. Yamamoto, D. Kanemoto, POKHAREL RAMESH KUMAR, 金谷 晴一, 吉田 啓二, A Low Power 2.4GHz LNA Operated in Subthreshold Region, Future Information Engineering Volume I, WIT Transactions on Communications and Information Technologie, 199-196, 2014.05.
34. POKHAREL RAMESH KUMAR, 金谷 晴一, A. Barakat, Back radiation reduction of 60 GHz CMOS slot Antenna-on-Chip (AoC) using Artificial Dielectric Layer (ADL) for Area Reuse, Proc. 2014 IEEE International Symposium on Antennas and Propagation and USNC-URSI National Radio ScienceMeeting, 1-1, 2014.07.
35. POKHAREL RAMESH KUMAR, 金谷 晴一, A. Barakat, Small Size 60 GHz CMOS Antenna-on-Chip, Proc. 44th European Microwave Conference, 104-107, 2014.10.
36. POKHAREL RAMESH KUMAR, 金谷 晴一, G. Zhang, A. Anand, A 1.9 GHz Low Phase Noise Complementary Cross-coupled FBARVCO in 0.18 um CMOS Technology, Proc. 44th European Microwave Conference, 253-256, 2014.10, A 1.9 GHz film bulk acoustic resonator (FBAR) based complementary cross-coupled voltage-controlled oscillator (VCO) designed in 0.18 μm CMOS is presented. DC latch and low frequency instability problems have been solved by the cross-coupled pairs with DC block capacitors. The open loop gain has been analyzed and optimized by considering the effect of transistors' size on enhancement of the stability at low frequencies and the loop gain at the desired oscillation frequency. The optimization of the phase noise has been done by considering the effect of PMOS transistors' size on the quality (Q-) factor and the impedance of FBAR. The final fabricated chip is packaged in dual in-line package (DIP) and the measured performance shows that the proposed FBAR-VCO achieves a phase noise of -148 dBc/Hz at 1 MHz offset with a figure of merit (FOM) of -212 dBc/Hz..
37. K. I. Yousef, 金谷 晴一, POKHAREL RAMESH KUMAR, A 0.18 CMOS Current Reuse Ultra-Wideband Low Noise Amplifier (UWB-LNA) with Minimized Group Delay Variations, Proc. 44th European Microwave Conference, 1392-1392, 2014.10.
38. Lechang Liu, POKHAREL RAMESH KUMAR, Post-Layout Simulation Time Reduction for Phase-Locked Loop Frequency Synthesizer Using System Identification Techniques, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 10.1109/TCAD.2014.2354291, 33, 11, 1751-1755, 2014.11, [URL], Compact model extraction of phase-locked loop (PLL)
frequency synthesizer using system identification techniques is proposed
to reduce post-layout simulation time. This is the first published compact
model for PLL using system identification techniques. It features an
autoregressive exogenous model for the charge pump and the loop filter
with a lookup table for nonlinearity compensation and a radial basis
function neural network for the voltage-controlled oscillator with nonlinear
frequency-voltage relationship, thereby reducing the post-layout
simulation time to 26% of the original circuits with the accuracy of 93%..
39. JIA HONGTING, POKHAREL RAMESH KUMAR, 金谷 晴一, Strong resonant coupling for short-range wireless power transfer using defected ground structures, Proc. 3rd International Japan-Egypt Conference on Electronics, Communications and Computers, 100-101, 2015.03.
40. Guoqiang Zhang, 金谷 晴一, 吉田 啓二, Tanaka Shuji, POKHAREL RAMESH KUMAR, A low phase noise FBAR based multiband VCO design, IEICE Electronics Express, 10, 13, 1-6, 2013.07.
41. 兼本 大輔, POKHAREL RAMESH KUMAR, 吉田 啓二, 金谷 晴一, Keigo Oshiro, A 10-bit 50MS/s 350 μW Small Die Area Capacitive Digital-to-Analog Converter for Bluetooth Applications, IEEJ Transactions on Electronics, Information and Systems,Vol.134 No.2 pp.328.329,2014.02., 134, 2, 328-329, 2014.02.
42. ANAND AWINASH, Nischal Koirala, POKHAREL RAMESH KUMAR, 金谷 晴一, 吉田 啓二, Analytical method to determine optimal out-of-band gain in multi-bit delta-sigma modulator, IEICE Electronics Express, vol. 9, no. 20, 1598-1603, 2012.10.
43. Rohana Sapawi, POKHAREL RAMESH KUMAR, Dayang Azra Awang Mat, 金谷 晴一, 吉田 啓二, A 0.9-3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique, Microwave and Optical Technology Letters, Vol. 54, Issue: 12, 2881-2884, 2012.12, A simple CMOS broadband power amplifier design with high linearity and good efficiency is proposed.The proposed power amplifier design employed stagger tuning technique that consist of two stages amplifier with different resonant frequencies to obtain a wider bandwidth from 0.9 to 3.5 GHz and low power consumption. To obtain high linearity self-biased circuit is employed at the first stage of amplifier. The measurement results indicated that the proposed design achieves average gain of 8.5 dB, an input return loss (S11) less than −3 dB and output return loss (S22) less than −5 dB. High linearity, that is, IIP3 of 13.4 dBm at 2 GHz, power added efficiency of 34% is obtained while consuming 24.4 mW power from 1.5 V supply voltage..
44. 金谷 晴一, S. Tsukamoto, T. Hirabaru, POKHAREL RAMESH KUMAR, 兼本 大輔, 吉田 啓二, Energy Harvesting Circuit on a One-Sided Directional Flexible Antenna, IEEE Microwave and Wireless Components Letters, 23, 3, 164-166, 2013.03.
45. POKHAREL RAMESH KUMAR, Prapto Nugroho, ANAND AWINASH, Abhishek Tomar, 金谷 晴一, 吉田 啓二, Low Phase Noise 14-Bit Digitally Controlled CMOS Quadrature Ring Oscillator, IEICE Trans. on Electronics, Vol E-96, No. 2, 262-269, 2013.02, High phase noise is a common problem in ring oscillators. Continuous conduction of the transistor in an analog tuning method degrades the phase noise of ring oscillators. In this paper, a digital control tuning which completely switches the transistors on and off, and a 1/f noise reduction technique are employed to reduce the phase noise. A 14-bit control signal is employed to obtain a small frequency step and a wide tuning range. Furthermore, multiphase ring oscillator with a sub-feedback loop topology is used to obtain a stable quadrature outputs with even number of stages and to increase the output frequency. The measured DCO has a frequency tuning range from 554 MHz to 2.405 GHz. The power dissipation is 112 mW from 1.8 V power supply. The phase noise at 4 MHz offset and 2.4 GHz center frequency is -134.82 dBc/Hz. The FoM is -169.9 dBc/Hz which is a 6.3 dB improvement over the previous oscillator design..
46. R. K. Pokharel, K. Uchida, A. Tomar, H. Kanaya, and K. Yoshida, Low phase noise, 18 kHz frequency tuning step, 5 GHz, 15 bit digitally controlled oscillator in 0.18 um CMOS technology, IEICE Trans. on Electronics, Vol. E93-C, no. 7, pp. xx-xxx, July 2010. (In press), 2010.07.
47. R. K. Pokharel, K. Wada, O. Hashimoto and T. Takahashi, A method for LTCC resonators to improve spurious responses on reduced-size microstrip structure, IEICE Trans. on Electronics, Vol. E87-C, no. 9, pp. 1517-1523, Sept. 2004., 2004.09.
48. S. A. Z. Murad, R. K. Pokharel, H. Kanaya, K. Yoshida, and O. Nizhnik, A 2.4 GHz 0.18µm CMOS Class E Single-Ended Switching Power Amplifier with Self Biased Cascode, Int. Journal of Electronic and Communications (AEU), (Elsevier publication), doi: 10.1016/j.aeue.2009.06.002., 2009.06.
49. A. I. A. Galal, R. K. Pokharel, H. Kanaya, and K. Yoshida, Linearization Technique using Bipolar Transistor at 5GHz Low Noise Amplifier, Int. Journal of Electronic and Communications (AEU), (Elsevier publication), (2009), doi: 10.1016/j.aeue.2009.07.008., 2009.07.
50. O. Nizhnik, R. K. Pokharel, H. Kanaya, and K. Yoshida, Low noise wide tuning range quadrature ring oscillator for multi-standard transceiver, IEEE Microwave and Wireless Components Letters, vol. 19, no. 7, pp. 470-472, July 2009. , 2009.07.
51. R. K. Pokharel, H. Kanaya, and K. Yoshida, Design and evaluation of -117dBc/Hz phase noise voltage-controlled oscillator using on-chip CPW resonator for 5 GHz-band WLAN, Microwave and Optical Technology Letters. , 52, 3, pp. 763-766, 2010.03.
52. Ramesh K. Pokharel, H. Kanaya and K. Yoshida, Design of 5GHz-band power amplifier with on-chip matching circuits using CPW impedance (K) inverters, Trans. of IEICE, vol. E91-C, no. 11, pp. 1824-1827, November, 2008. , 2008.11.
53. Haruichi KANAYA, Ramesh K. POKHAREL, Fuminori KOGA, Keiji YOSHIDA , Design and Verification of On-Chip Impedance-Matching Circuit Using Transmission-Line Theory for 2.4 GHz-Band Wireless Receiver Front-End, IEICE Trans. On Electronics., Vol.E89-C No.12 pp.1888-1895,December 2006., 2006.12.
54. Haruichi Kanaya, Ramesh K. Pokharel, Sangtae Kim, Akihiro Imada, and Keiji Yoshida, Design of Power Amplifier with On-Chip Matching Circuits using CPW Line Impedance
(K) Inverters, 11th WSEAS CSCC, Crete island, Greece, July 2007., paper number: 561-265, 2007.07, [URL].
55. R. K. Pokharel, K. Wada, O. Hashimoto, and T. Takahashi, A method for LTCC resonators to improve spurious responses on reduced-size microstrip structure, Trans. of IEICE, Vol. E87-C, pp. 1517-1523., 2004.09.
56. R. K. Pokharel, K. Wada, O. Hashimoto, and T. Takahashi, Improvement of spurious responses with attenuation poles in stopband by microstrip resonator, IEE Electronics Letters, vol. 40, no. 8, pp. 481-482., 2004.04, [URL].
57. R. K. Pokharel, O. Hashimoto, and M. Toyota, Analysis of EM environment for DSRC system on express highway with wave absorbers on sidewalls and pavement, IEICE Trans. Electron.,, Vol. 89-C, no. 1, pp 61-68., 2006.01, [URL].
58. R. K. Pokharel, K. Wada, O. Hashimoto, and T. Takahashi, Fundamental characteristics of microstrip resonators loaded with dielectric rods for suppression of spurious responses, IEE Proc. Microwaves, Antennas, & Propagation, vol. 153, issue 4, pp. 341-346., 2006.08, [URL].
59. Ramesh K. Pokharel, K. Wada and O. Hashimoto, Improvement of spurious responses of coupled-line BPFs using interdigital-type resonators, Microwave and optical Technology Letters, vol. 44, no. 2, pp. 126-130, Jan. 2005., 2005.01.
60. Ramesh K. Pokharel, K. Wada and O. Hashimoto, Out-of-band improvement by BPFs with multiple attenuation poles using a condition of variable coupling length of a parallel partially coupled-line section, Microwave and optical Technology Letters, vol. 47, no. 1, pp.4-9, October 2005, 2005.09.
61. Ramesh K. Pokharel, M. Toyota and O.Hashimoto, Analysis of EM wave absorbers for improvement of DSRC EM environment on express highway, IEEE Trans. on Microwave Theory and Techniques, vol. 53, no. 9, pp. 2726-2731, Sept. 2005.
主要学会発表等
1. Islam Mansour, Marwa Mansour, Mohamed Aboualalaa, Ahmed Allam, Adel B. Abdel-Rahman, Mohammed Abo-Zahhad, Ramesh Pokharel, 70% Improvement in Q-factor of spiral inductor and its application in switched K-band VCO using 0.18 um CMOS technology, 30th Asia-Pacific Microwave Conference, APMC 2018, 2018.11, [URL], A novel technique for increasing the quality factor of the on-chip inductor is proposed in this paper. A high-quality factor shunt inductor is designed using the lower layers 5 and 3 in 0.18 um CMOS technology so the top layer is valid for other circuit components. The quality factor is improved by 70 % in the Ku, K and Ka-band compared to the single layer inductor. Furthermore, the proposed inductor has a compact area of about 0.0089 mm2. This shunt inductor is used with a switched MOS varactor capacitors to construct a switched notch filter which has a sharp skirt characteristic and can be used in the VCO circuits. Using this switched shunt inductor resonator, the phase noise of the VCO is enhanced by 8 dB compared to single layer inductor resonator, moreover, the frequency tuning range is doubled. The VCO achieves a wide tuning range of 2.5 GHz, the first band from 18.8 to 19.97 GHz while the second band from 19.96 to 21.3 GHz. The phase noise at 1MHz is -112.4 and -112.5 dBc/Hz at the low and high band and this results FoM of-192.2 and -192.5 at 19.9 GHz and 21.3 GHz, respectively. The figure of merit considering the frequency tuning range (FoM
T
) is -194.4 dBc/Hz and the active VCO core area is 0.039 mm
2.
2. Ramesh Pokharel, Nusrat Jahan, Adel Barakat, Dual Resonance Circuits by Defected Ground Structure Resonators for Low Phase Noise K-Band CMOS VCO, 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018, 2018.08, [URL], We analyze the quality factor (Q_U/Q_K) of three different types of defected ground structure (DGS) resonators including a series resonance in addition to the parallel one. Then, we implement the resonators to design high-performance K-band VCOs in 0.18μ CMOS Technology and finally, a low phase noise VCO at K-band is introduced..
3. Islam Mansour, Mohamed Aboualalaa, Nusrat Jahan, Adel Barakat, Ramesh Pokharel, Ahmed Allam, Adel B. Abdel-Rahman, Mohammed Abo-Zahhad, Design of multi-layers DGS resonator for phase noise improvement of K-Band VCOs in 0.18 µm CMOS technology, 61st IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2018, 2018.08, [URL], A novel technique for a low phase noise and compact K-band Voltage-Controlled Oscillator (VCO) using multi-layers DGS resonator is proposed. The proposed DGS resonator realizes an additional series resonance at the higher side of parallel resonance frequency, and this results in improving both the active and loaded quality factor of the resonator. The proposed resonator has active quality factor of 130 and a compact size of 0.009 mm
2
(0.000459 ?
2
). Using the proposed DGS resonator in the VCO causes 9 dB improvement in the phase noise compared the VCO implemented using the conventional LC resonator. Two VCOs are designed using the method to illustrate the effect of the series resonance. The first VCO is designed three layers DGS resonator and the other VCO using two layers DGS resonator. The designs are implemented in 0.18 µm CMOS technology and consume 2.9 mW power, and from the post layout results, the first proposed VCO oscillates from 19.6 to 21.3 GHz (8.3 %) and has a phase noise of -113.2 dBc/Hz at 1 MHz offset frequency, and this results in the figure of merit (FoM) and FoM taking account of the tuning range to be -194.4 and -192.7 dB, respectively. The second VCO has a tuning range of 6.1 % and phase noise of -114 dBc/Hz @ 1 MHz offset at 19.6 GHz oscillation..
4. M. R. Saad, Fairus Tahar, Sumin Chalise, Adel Barakat, Kuniaki Yoshitomi, Ramesh Pokharel, High FOM Dual Band Wireless Power Transfer using Bow-tie Defected Ground Structure Resonators, 2018 IEEE Wireless Power Transfer Conference, WPTC 2018, 2018.06, [URL], This work presents a dual-band wireless power transfer (WPT) system with high figure of merit (FoM). One band can be used for power transfer and another for data transfer in biomedical applications. A Bow-tie Defected Ground Structure (DGS) resonators with high quality (Q-) factor and coupling (k-) factor is utilized for ensuring high efficiency. An equivalent circuit model using the admittance (J-) inverters is utilized to design the admittance inversion and compensation networks. The measured result shows that the proposed WPT system is able to transfer the power at both of the bands with a highFoM, making a suitable candidate for compact near filed WPT applications..
5. Fairus Tahar, Sumin Chalise, Kuniaki Yoshitomi, Adel Barakat, Ramesh Pokharel, Compact Dual-Band Wireless Power Transfer Using Overlapped Single Loop Defected Ground Structure, 2018 IEEE Wireless Power Transfer Conference, WPTC 2018, 2018.06, [URL], This paper presents a compact dual-band wireless power transfer (WPT) system using overlapped defected ground structure for biomedical applications. One band for power and another for data transfer. The proposed defected ground structure can channel two distinct resonant frequencies. As a result, the fabricated WPT device has almost 50% reduction in the size without changing other performances compared to ref. [9]. The fabricated device is 15 mm ×15 mm. The measured efficiency is 71% and 73%, respectively at 0.45 GHz and 0.95 GHz at WPT distance of 12.5mm..
6. Basma E. Abu-Elmaaty, Omnia M. Nawwar, Mohammed S. Sayed, Hossam M.H. Shalaby, Ramesh Pokharel, Silicon-on-insulator first-order mode converter based on binary phase plate, 2018 Japan-Africa Conference on Electronics, Communications, and Computations, JAC-ECC 2018, 2018.12, [URL], A silicon-on-insulator fundamental to first-order mode converter is proposed based on binary phase plate. The device can be operated in both polarizations simultaneously as it converts both fundamental TE and TM modes to first-order TE and TM modes, respectively which will be very useful in implementing PDM-MDM systems. The proposed device has a simple and compact structure. It has a low insertion loss of -2 dB and low crosstalk..
7. Ramesh K. Pokharel, Adel Barakat, and Fairus Tahar, K and Q Factors in Near-Field Wireless Power Transfer: A Case Study of DGS Resonators, 2017 IEEE MTT-S International Microwave and RF Conference, 2017.12, [URL], This paper discusses the probability of improving the degree of freedom in implementing wireless power transfer (WPT) systems. This is possible by utilizing the defected ground structures (DGSs). The WPT efficiency can be increased by optimizing the coupling coefficient (K) between the transmitter and the receiver, and the quality (Q-) factor of them. DGSs can be implemented in different shapes; hence, the K and Q-factor of these DSGs are realized with different values depending on the DGS shape. In return, the achievable WPT efficiency can be maximized by careful selection of the DGS shape and dimensions depending on the system efficiency and distance requirements..
8. Nusrat Jahan, Chen Baichuan, Ramesh K Pokharel, Adel Barakat, A K-Band VCO Employing High Active Q-factor Defected Ground Structure Resonator in 0.18 pm CMOS Technology, 2018 IEEE International Conference in Circuits and Systems (ISCAS2018), 2018.05, [URL], In this paper, a new theory to improve the phase noise of a Voltage-Controlled Oscillator (VCO) utilizing dual series and parallel resonance to improve the susceptance slope parameter of the resonator circuit is proposed, and its effectiveness is demonstrated to design a low phase noise K-band VCO. The proposed dual resonance is realized using a compact defected ground structure (DGS) resonator, which achieve the additional series resonance by loading its transmission line by a series capacitor. The resulting susceptance slope, and active quality (Qk-) factor of the resonator circuit enhance that, in returns, improves the phase noise by 3.2dB of the same circuit without the series resonance. The design is implemented in 0.18 μm CMOS technology, and the post-layout simulation results show that VCO has a tuning range of 3.4%, and low phase noise with − 111.9 dBc/Hz @1 MHz offset at 21.04 GHz oscillation. The VCO consumes 7.5 mW power resulting in a FoM of −188.7 dB.
9. M Aboualalaa, Adel B Abdel-Rahman, A Allam, Ramesh K Pokharel, Kuniaki Yoshitomi, H Elsadek, Compact 24GHz half-slot antenna for energy combining, 2018 International Applied Computational Electromagnetics Society Symposium (ACES), 2018.03, [URL], A compact half-slot microstrip antenna is proposed in this paper. The antenna consists of microstrip line-fed half slot, and an open-circuited stub is connected to the microstrip feed line to adjust the matching at the operated frequency band. A half slot is used for miniaturization, as well as due to concentrating the field at only half slot; consequently, it decreases the resonance frequency and improves the antenna radiation characteristics. The antenna radiates at 24 GHz with measured fractional impedance bandwidth of 9%. The antenna gain at the resonant frequency is 5.2 dBi. The proposed antenna shows about 60% length reduction. Therefore, the proposed half slot antenna could be used for energy harvesting applications, at 24 GHz ISM band, due to its compact size with improved gain value. The proposed antenna was designed using ANSYS high-frequency structure simulator (HFSS). The simulated and measured results show good agreement..
10. F. Tahar, A. Barakat, R. Saad, K. Yoshitomi, and R. K. Pokharel, Dual-Band Wireless Power Transfer System Using Circular Defected Ground Structure Resonators for Biomedical Applications, 2017 International Conference in Circuits and Systems (ISCAS2017), 2017.05, [URL], In this paper, we proposed and developed a compact dual-band wireless power transfer system for future wireless power supply to embedded sensors and implants. This was fabricated in the commercial substrate, so it is low cost but it has high efficiency..
11. Adel Barakat, Sherif Hekal, Ramesh Kumar Pokharel, Simple design approach for asymmetric resonant inductive coupled WPT systems using J-inverters, 2016 Asia Pacific Microwave Conference, 2016.12, [URL], This paper presents a simple and precise design method for asymmetric resonant
inductive coupled wireless power transfer (WPT) systems without the involvement of circuit
or electromagnetic (EM) simulators. The design method is based on the generalized second-
order band-pass filter (BPF). First, the values of the BPF's J-inverters are computed based on
the mutual coupling between the transmitter (TX) and the receiver (RX). Then, the required
components are extracted from the J-inverters values. We achieved good agreements.
12. ADEL Barakat, N Mahmoud, POKHAREL RAMESH KUMAR, Low insertion loss 60 GHz CMOS H-shaped resonator BPF, 2017 IEEE Radio and Wireless Symposium (RWS), 2017.01, [URL], In this paper, a new theory to realize low loss of an on-chip bandpass filter at 60GHz band is proposed and experimentally verified..
13. Nessim Mahmoud, Adel B Abdel-Rahman, Adel Barakat, Ramesh Kumar Pokharel, Performance enhancement of 0.18 um CMOS on chip bandpass filters using H-shaped parasitic element, 2015 27th International Conference on Microelectronics (ICM), 2015.12, [URL], A design of an improved open loop resonator on-chip bandpass filter for 60 GHz
millimeter-wave applications using 0.18 µm CMOS technology is presented..
14. Ramesh Kumar Pokharel, B. Amalina, Comparative Design of Extremely Low Phase Noise Oscillator in Class-B and Class-C by Integrating Film Bulk
Acoustic Resonator (FBAR) on CMOS Wafer for Low Power Applications
, 2015 IEEE MTT-S International Microwave and RF Conference (IMaRC), 2015.12, This paper presents the comparative design of a CMOS cross-coupled oscillator in class-B and Class-C topology, respectively using film bulk acoustic resonator (FBAR) in order to improve the phase noise and power consumption. The design issues such as low frequency stability, phase noise issues and optimization method of FBAR on a CMOS wafer will will be discussed. Experiment results and performance comparison will be discussed..
15. M. Hanif, ADEL TAWFIK MOHAMED MOHAMED BARAKAT, POKHAREL RAMESH KUMAR, A gain enhanced 60 GHz CMOS antenna-on-chip using off-chip Mu near zero metamaterial lens, , 2015 IEEE 4th Asia-Pacific Conference on Antennas and Propagation (APCAP), 2015.07, (MNZ-MM) lens to enhance the gain of a 60 GHz Antenna-on-Chip (AoC). First, a MNZ-MM
unit cell is designed to ensure the near zero characteristics at the 60 GHz band.
Furthermore, a 3 by 3 matrix of the MNZ-MM is placed in the desired direction of radiation
such that the radiated waves are coupled and the gain is enhanced and the AoC's| S11| is
negligibly affected. The simulated gain and efficiency of the AoC with MNZ-MM lens are 2.8
dBi and 35%, respectivel.
16. Khalil Yousef, A. B. Abdel-Rahman, Ramesh Kumar Pokharel, Hongting Jia, An eight-phase CMOS injection locked ring oscillator with low phase noise, 2014 IEEE International Conference on Ultra-WideBand (ICUWB), 2014.09, [URL], This paper presents the design of a low DC power, low phase noise single-ended ring oscillator (RO) in 0.18 μm CMOS technology. It introduces a new RO output phase control technique. This RO uses a voltage pull-down circuit to produce different output signal phases. The proposed RO employs the pulse injection (PI) technique for phase noise and spurious signals suppression. The proposed injection locked ring oscillator (ILRO) can be used for phase shift keying (PSK) implementation. The proposed ILRO has an oscillation frequency of 4.5 GHz with a fine tuning range of 540 MHz. It consumes only a 4.25 mW of power while having a phase noise of -130.9 dBc/Hz @ 1MHz offset. Through this ILRO design, a figure of merit (FoM) of -197.68 dBc/Hz has been achieved..
17. H. Hekel, A. B. Abdel-Rahman, M. Hanif, Ramesh Kumar Pokharel, Strong resonant coupling for short-range wireless power transfer applications using defected ground structures, 2015 IEEE Wireless Power Transfer Conference (WPTC), 2015.05, [URL], This paper presents a new structure for highly efficient short-range wireless power transfer. The proposed structure is based on strongly coupled resonators using H-slot defected ground structures. An equivalent circuit model for H-slot coupled resonators is introduced. Measurement results for the new proposed structure show a power transfer efficiency of 70% at 15 mm distance between driver and load resonators. Experimental measurements have shown good agreement with electromagnetic and circuit simulations..
18. Adel Barakat, A. B. Abdel-Rahman, M. Hanif, Ramesh Kumar Pokharel, Miniaturized 60 GHz triangular CMOS Antenna-on-Chip using asymmetric artificial magnetic conductor, 2015 IEEE 15th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2015.01, [URL], This paper presents a miniaturized triangular Antenna-on-Chip (AoC) designed and fabricated on a 0.18 μm CMOS process using asymmetric rectangular artificial magnetic conductor (R-AMC). An AMC acts as a shield plane between the AoC and the lossy CMOS substrate. AoC using asymmetric R-AMC presents a smaller overall area than that of the previous reported AoC with symmetric AMCs. The triangular AoC area including the asymmetric AMC cells is only 0.81mm2 with a simulated gain of -0.2 dBi at 60 GHz. Measurements confirm the wide impedance bandwidth of the AoC.
19. Ibrahim Abdalla, M. Ragab, Ramesh Kumar Pokharel, Hongting Jia, A DC-2.5GHz voltage variable attenuator in 0.18-μm CMOS technology, 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2014.11, [URL], A CMOS variable voltage attenuator(VVA) with wide bandwidth has been designed and fabricated in a 0.18-μm CMOS process. Four bridge-T stages are cascaded to achieve 12 dB of dynamic range attenuation over a frequency range from DC up to 2.5 GHz. Cascaded bridge-T stages can be programmed to achieve the full scale attenuation and ensure good input and output matching. The design operates with 1.5-dB step size and with a maximum input power of -13 dBm in the entire frequency DC-2.5 GHz range. Worst case S11 is -11.5 dB across the frequency band. The design achieves an input third order intercept point (IIP3) of+31 dBm at maximum-attenuation.
20. Hamed Mosalam, M. Ragab, Ramesh Kumar Pokharel, Hongting Jia, A 5–9 GHz CMOS Ultra-wideband power amplifier design using load-pull, 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), 2013.08, [URL], The design of 5-9 GHz, two stages CMOS power amplifier (PA) for Ultra-wideband (UWB) is presented in this paper. Post-layout simulation results indicated a power gain S21 of 16± 0.5dB, an input return loss S11 less than -4 dB and an output return loss S22 less than -5 dB over the frequency range of interest. Source-pull contours were used to design the inter stage matching of the PA. The proposed two stages PA achieves an average Power Added Efficiency (PAE) of 12.4% and an output 1-dB compression above 0 dBm over the same frequency band. Moreover, the proposed UWB PA achieves group delay of 170±20 ps with power consumption of 25 mW from a 1.8V supply voltage. The UWB PA is designed in TSMC 0.18 μm CMOS technology..
21. Hamed Mosalam, A. B. Adel, Ramesh Kumar Pokharel, Hongting Jia, 5.0 to 10.6 GHz 0.18 µm CMOS power amplifier with excellent group delay for UWB applications, 2015 IEEE MTT-S International Microwave Symposium (IMS), 2015.05, [URL], The optimization technique to realize the minimum group delay (GD) of a 5-10.6 GHz, two stages CMOS Ultra Wideband power amplifier (UWB-PA) is presented and implemented in 0.18 μm CMOS technology. The fabricated UWB-PA has a power gain (|S21|) of 14± 1 dB, maximum power added efficiency and an output 1-dB compression of 10 %, and 2 dBm, respectively at 6 GHz. In addition, the PA has an excellent small group delay variation of 147± 40 ps with power consumption of 20 mW and this is the smallest variations among CMOS PAs so far reported..
22. Adel Barakat, Ramesh Kumar Pokharel, Haruichi Kanaya, Small size 60 GHz CMOS Antenna-on-Chip: Gain and efficiency enhancement using asymmetric Artificial Magnetic Conductor, 2014 44th European Microwave Conference (EuMC), 2014.10, [URL], This paper presents a small size 60 GHz Antenna-on-Chip (AoC) designed and fabricated using 0.18 um TSMC Complementary Metal Oxide Semiconductor (CMOS) process. AoC performance is enhanced using asymmetric Artificial Magnetic Conductor (AMC). The AoC area including the AMC is 1715 um by 710 um. As AMC shields AoC from the lossy CMOS substrate, simulated gain of -0.25 dBi is achieved at 60 GHz for design rule compatible circular AoC with 12.8 dB front-to-back ratio (FBR) due to removal of AMC cells below the AoC. Measurements agree well with simulation results and confirm operation at the 60 GHz band with a peak measured gain of -3 dBi at 64 GHz..
23. Adel Barakat, POKHAREL RAMESH KUMAR, 吉田 啓二, Ahmed Allam, Compact size high gain AoC using rectangular AMC in CMOS for 60 GHz millimeter wave applications, 2013 IEEE MTT-S International Microwave Symposium, 2013.06, [URL], This paper presents a compact size, high gain triangular Antenna-on-Chip (AoC), designed and fabricated using a 0.18 μm CMOS process and optimized over different cells' configurations of rectangular artificial magnetic conductor (R-AMC). An AMC acts as a shield plane between the AoC and the lossy CMOS substrate. R-AMC shows better shielding characteristics than previously reported AMCs. Measurement results confirm the wide impedance bandwidth of the AoC..
24. Khalil Ismail Khalil Yousef, POKHAREL RAMESH KUMAR, JIA HONGTING, 金谷 晴一, 吉田 啓二, Ahmed Allam, CMOS Ultra-Wideband Low Noise Amplifier (UWB-LNA) Using Symmetric 3D RF Integrated Inductor, IEEE International Conference on Ultra-Wideband , 2013.09, [URL].
25. POKHAREL RAMESH KUMAR, Daisuke Kanemoto, 金谷 晴一, 吉田 啓二, Design Technique for a High-speed SAR ADC Using Non-binary Search Algorithm and Redundancy, 2013 Asia-Pacific Microwave Conference Proceedings, 2013.11, [URL].
26. Tomoya Ijiguchi,, Daisuke Kanemoto, POKHAREL RAMESH KUMAR, Yoshida Keiji, 金谷 晴一, Development of Circularly Polarized Planar Slot Antenna for 5.8 GHz-DSRC Application, 2013 Asia-Pacific Microwave Conference Proceedings, 2013.11, [URL].
27. POKHAREL RAMESH KUMAR, Prapto Nugroho, ANAND AWINASH, Haruichi Kanaya, Keiji Yoshida, Digitally Controlled CMOS Quadrature Ring Oscillator with Improved FoM for
GHz Range All-Digital Phase-Locked Loop Applications
, Dig. of 2012 IEEE International Microwave Symposium (IMS), 2012.06, [URL].
28. Prapto Nugroho, POKHAREL RAMESH KUMAR, ANAND AWINASH, 金谷 晴一, 吉田 啓二, A Low Power 8-bit Digitally Controlled CMOS Ring Oscillator, Proc. of 2012 European Microwave Conference, 2012.10, [URL], High phase noise is a common problem in ring oscillators. Continuous conduction of the transistor in an analog tuning method degrades the phase noise of ring oscillators. In this paper, a digital control tuning which completely switches the transistors on and off, and a 1/f noise reduction technique are employed to reduce the phase noise. A 14-bit control signal is employed to obtain a small frequency step and a wide tuning range. Furthermore, multiphase ring oscillator with a sub-feedback loop topology is used to obtain a stable quadrature outputs with even number of stages and to increase the output frequency. The measured DCO has a frequency tuning range from 554 MHz to 2.405 GHz. The power dissipation is 112 mW from 1.8 V power supply. The phase noise at 4 MHz offset and 2.4 GHz center frequency is -134.82 dBc/Hz. The FoM is -169.9 dBc/Hz which is a 6.3 dB improvement over the previous oscillator design..
29. A. I. A. Galal, R. K. Pokharel, K. Uchida, H. Kanaya, and K. Yoshida, Ultra-wideband Low Noise Amplifier with Shunt Resistive Feedback in 0.18um CMOS Process, IEEE 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2010.01.
30. S. A. Z. Murad, R. K. Pokharel, K. Uchida, H. Kanaya, and K. Yoshida, A 2.4 GHz 0.18 um CMOS Class E Single-Ended Power Amplifier without Spiral Inductors, IEEE 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2010.01.
31. R. K. Pokharel, K. Uchida, H. Kanaya, and K. Yoshida, Low Phase Noise 18 kHz Frequency Tuning Step 5 GHz DCO Using Tiny Capacitors Based on Transmission Lines, IEEE 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2010.01.
32. H. Kanaya, N. Koga, M. A. Abdelghany, R. K. Pokharel, and K. Yoshida, Low Flicker-Noise and Low Leakage Direct Conversion CMOS Mixer for 5GHz Application, Proc. of 2009 Asia Pacific Microwave Conference (APMC), Singapore, December 2009. , 2009.12.
33. M. A. Abdelghany, R. K. Pokharel, H. Kanaya, and K. Yoshida, A Low Flicker Noise Direct Conversion Receiver for the IEEE 802.11a Wireless LAN Standard, Proc. of 2009 Asia Pacific Microwave Conference (APMC), Singapore, December 2009. , 2009.12.
34. H. Kanaya, K. Tsumura, R. K. Pokharel, H. Kanaya, K. Yoshida, A. Ishikawa, S. Fukagawa, and A. Tahira, Development of a One-Sided Directional Thin Planar Antenna with Quarter Wavelength Top Metal, Proc. of 2009 Asia Pacific Microwave Conference (APMC), Singapore, December 2009. , 2009.12.
35. H. Urabe, R. K. Pokharel H. Kanaya, K. Yoshida, A. Ishikawa, S. Fukagawa, A. Tahira, Design and performance of 800MHz/2GHz dual band small planar antenna, Proc. of 2009 Asia Pacific Microwave Conference (APMC), Singapore, December 2009. , 2009.12.
36. R. Dong, R. K. Pokharel, H. Kanaya, and K. Yoshida, An UWB Bandpass Filter with Large Notch Suppression, Proc. of 2009 Asia Pacific Microwave Conference (APMC), Singapore, December 2009. , 2009.12.
37. S. A. Z. Murad, R. K. Pokharel, H. Kanaya, and K. Yoshida, A 3.0-7.5 GHz CMOS UWB PA for Group 1~3 MB-OFDM Application Using Current-Reused and Shunt-Shunt Feedback, the first International Conference on Wireless Communications & Signal Processing, WCSP2009., 2009.11.
38. R. K. Pokharel, K. Uchida, H. Kanaya, and K. Yoshida, 10 Bit 2/5 GHz Dual Band Digitally-Controlled LC-Oscillator in 0.18 um CMOS Process, Proc. of 2009 Asia Pacific Microwave Conference (APMC), Singapore, December 2009. , 2009.12.
39. S. A. Z. Murad, R. K. Pokharel, H. Kanaya, and K. Yoshida, A 3.1 - 4.8 GHz CMOS UWB Power Amplifier Using Current Reused Technique, the 5th International conference on wireless communications, networking, and mobile computing networks, 2009.09.
40. R. K. Pokharel, H. Kanaya, and K. Yoshida, Low Phase Noise 10 bit 5 GHz DCO Using On-Chip CPW Resonator in 0.18 mm CMOS Technology, First Asian Himalayas International Conference on Internet AH-ICI2009, The next generation of mobile, wireless and Optical communications networks, 2009.11.
41. R. K. Pokharel, O. Nizhinik, H. Kanaya, and K. Yoshida, Wide Tuning Range CMOS Quadrature Ring Oscillator of Lowest Figure of Merit, 2009 IEEE European Microwave Integrated Circuits (EuMIC), 2009.09, [URL].
42. H. Kanaya, R. K. Pokharel, Y. Nakamura, and K. Yoshida, Development of one-sided thin planner antenna for 5GHz wireless communication applications, 20009 IEEE Symposium on Antenna and Propagation, 2009.06, [URL].
43. M. A. Abdelghany, R. K. Pokharel, H. Kanaya, and K. Yoshida, A low flicker noise high conversion gain RF-CMOS mixer with differential active inductor, Proc. of 2009 Korea-Japan Microwave Conference (KJMW), 2009.04.
44. Abhishek Tomar, R. K. Pokharel, Haruichi Kanaya, Keiji Yoshida, Design of Digitally Controlled LC Oscillator with Wide Tuning Range in 0.18um TSMC CMOS Technology, Design of Digitally Controlled LC Oscillator with Wide Tuning Range in 0.18um TSMC CMOS Technology, 2008.12.
45. A. I. A. Galal, R. K. Pokharel, H. Kanaya, and K. Yoshida, Comparison between Bipolar and NMOS Transistors in Linearization Technique at 5GHz Low Noise Amplifier, Proc. of 2008 Asia-Pacific Microwave Conference (APMC), 2008.12.
46. Y. Nakamura, H. Kanaya, R. K. Pokharel, and Keiji Yoshida, Design and performance of electrically small planar antennas with matching circuit at 2.4GHz band, Proc. of 2008 Asia-Pacific Microwave Conference (APMC) , 2008.12.
47. R. K. Pokharel, A. Tomar, H. Kanaya, and K. Yoshida, Design of Highly linear, 1GHz 8-bit digitally controlled ring oscillator with wide turning range in 0.18um CMOS process, The Proc. of China-Japan Microwave conference (CJMW), 2008.09.
48. R. K. Pokharel, A. I. A. Galal, O. Nizhnik, H. Kanaya and K. Yoshida, Design of flat gain and low noise figure LNA for 3.1-10.2GHz band UWB applications in 0.18um CMOS process, The 2008 IEEJ international workshop on AVLSI, 2008.07.
49. R. K. Pokharel, S. Sasaki, O. Nizhnik, H. Kanaya, and K. Yoshida, Design of VCO Using On-Chip CPW Resonator for 5 GHz-Band Wireless Applications, Proc. of 2008 Asia-Pacific Microwave Conference (APMC), 2008.12, [URL].
50. Oleg Nizhnik, Ramesh Pokharel, Haruichi Kanaya, Keiji Yoshida, High Dynamic Range Mixer in 0.18 um Technology for WLAN Direct Conversion Receiver , Proceedings of 2008 International Conference on Microwave and Millimeter Wave Technology (ICMMT 2008), 2008.04.
51. 中村優太・鍋嶋隆介・ポカレル ラメシュ・金谷晴一・吉田啓二, 片面指向性をもつ整合回路一体型平面アンテナの開発, 電子情報通信学会技術研究報告, 2008.04.
52. 佐々木慎一・今田明寛・ポカレル ラメシュ・金谷晴一・吉田啓二, 5.2GHz帯VCOの開発と高性能化の検討, 電子情報通信学会技術研究報告, 2008.04.
53. Haruichi Kanaya, Ryusuke Nabeshima, Ramesh Pokharel, Keiji Yoshida, Masato Tsujii, and Ryoichi Iino, Development of an Electrically Small One-Sided Directional Antenna with Matching Circuit, 2008 IEEE Radio and Wireless Symposium Proceedings, 2008.01.
54. R. K. Pokharel, A. Imada, S. Sasaki, H. Kanaya, and K. Yoshida, Design of VCO for 2.4GHz Wireless Applications Using Transmission Line Resonators, 2007APMC (2007 Asia-Pacific Microwave Conference) Proceedings, 2007.12.
55. H. Kanaya, T. Hashiguchi, R. K. Pokharel, and K. Yoshida, Study of A CPW-Fed Slot Dipole One-Sided Directional Antenna for UWB Systems, 2007APMC (2007 Asia-Pacific Microwave Conference) Proceedings, 2007.12.
56. H. Kanaya, R. Nabeshima, R. K. Pokharel, and K. Yoshida, Design and Performance of an Electrically Small Antenna with Matching Circuit, 2007APMC (2007 Asia-Pacific Microwave Conference) , 2007.11.
57. O. Nizhnik, R.K. Pokharel, H. Kanaya, and K. Yoshida, Design of High-Linearity Amplifier for Wireless LAN Transceiver, 2007APMC (2007 Asia-Pacific Microwave Conference), 2007.12.
58. A. Tomar, R. K. Pokharel, O. Nizhnik, H. Kanaya, and K. Yoshida, Design of 1.1 GHz Highly Linear Digitally-Controlled Ring Oscillator with Wide Tuning Range, IEEE International Workshop on Radio-Frequency Integration Technology, 2007.12.
59. Akihiro IMADA, Sangtae, KIM, Ramesh POKHAREL, Haruichi KANAYA and Keiji YOSHIDA, CPWインピーダンス回路を用いたRFフロントエンドLSIの設計・評価, 電子情報通信学会技術研究報告, 2007.04.
60. H. Kanaya, R. K. Pokharel, S. Kim, A. Imada, K. Yoshida, Design of Power Amplifier with On-Chip Matching Circuits using CPW Line Impedance (K) Inverters, 11th WSEAS International Conference on CIRCUITS, 2007.07.
61. H. Kanaya, R. K. Pokharel, , F. Koga, D. Arima, S. Kim, and K .Yoshida, Design of Coplanar Waveguide on-chip impedance matching circuit for wireless receiver front-end, IEEE Radio Frequency Integrated Circuit Conference (2006), 2006.06, [URL].
62. R. K. Pokharel and M. Ishii, Accuracy and Applications of Time-Domain Numerical Electromagnetic Code to Lightning Surge Analysis: Survey and Comparative Study in Time- and Frequency-Domain Codes, International Conference on Lightning Protection (ICLP), 2006, 2006.08.
63. R. K. Pokharel, H. Kanaya, and K. Yoshida, Development of high conversion gain double balanced mixer for high performance direct conversion receiver, 電子情報通信学会、ソサェティ大会, 2006.08.
64. H. Kanaya, R. K. Pokharel, K. Yoshida,, “Design of CMOS design circuit connected to a transmission line for high speed and low power optical switch,” China-Japan Joint Microwave Conferrence, 23-25 Aug, 2006., China-Japan Joint Microwave Conferrence, 23-25 Aug, 2006., 2006.08.
特許出願・取得
特許出願件数  1件
特許登録件数  1件
学会活動
所属学会名
電気学会
電子情報通信学会
IEEE (The Institute of Electrical and Electronics Engineers)
学会大会・会議・シンポジウム等における役割
2018.08.15~2018.08.17, 2018 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT2018), TPC.
2018.12.16~2018.12.18, International Japan-Africa Conference on Electronics, Communications and Computers (JAC-ECC2018), TPC.
2017.12.18~2017.12.20, Japan-Africa Conference on Electronics, Communications and Computers (JAC-ECC2017), TPC.
2015.03.16~2015.03.18, The Third International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC2015), Conference Chair (実行委員長).
2016.05.31~2016.06.02, The Fourth International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC2016), Conference Chair (実行委員長).
2017.12.11~2017.12.13, 2017 IEEE MTT-S International Microwave and RF Conference, 座長(Session Chair).
2017.12.11~2017.12.13, 2017 IEEE MTT-S International Microwave and RF Conference, TPC.
2017.11.13~2017.11.16, 2017 Asia Pacific Microwave Conferrence, 座長(Session Chair).
2013.10.07~2013.10.07, The 5th International Conference on Information Technology and Electrical Engineering, 座長(Chairmanship).
2008.09.10~2008.09.12, 2008 China-Japan Joint Microwave Coferrence, 座長(Chairmanship).
2008.03.22~2008.03.22, NESAJ Symposium on Knowledge Transfer, 座長(Chairmanship).
2007.07.24~2007.07.23, The 11th WSEAS International Conference on CIRCUITS, 座長(Chairmanship).
2017.02.17~2017.02.18, International conference on Electrical, Computers and Communication Engineering, Advisory Comimittee.
2016.05.31~2016.06.02, 2016 The Third International Japan-Egypt Conference on Electronics, Communications and Computers (第4回 日本エジプト電子・通信・計算機に関する国際会議), 委員長(Conference Chair).
2015.03.16~2016.03.18, JEC-ECC( Japan Egypt Conference on Electronics, Communications and Computers), Conference Chair (委員長).
2009.09.28~2009.09.29, 平成21年度(第62回)電気関係学会九州支部連合大会, プログラム編集員.
学会誌・雑誌・著書の編集への参加状況
2012.04~2020.03, IEEE Trans. on Circuits and Systems II: Express Brief, 国際, 査読委員.
2012.04~2020.03, IEEE Microwave and Components Letters, 国際, 査読委員.
2012.05~2022.04, IEEE Transactions on Microwave Theory and Techniques, 国際, 査読委員.
2013.05~2020.04, IEICE, 国際, 査読委員.
2015.07~2016.03, IEICE-Special Section on Solid-State Circuit Design Architecture, Circuit, Device and Design Methodology, 国際, 編集委員.
2012.03~2015.03, ELEX, 国内, 編集委員.
学術論文等の審査
年度 外国語雑誌査読論文数 日本語雑誌査読論文数 国際会議録査読論文数 国内会議録査読論文数 合計
2019年度 11  14 
2018年度 18  21 
2017年度 10  16 
2016年度 10  18 
2015年度 13 
2012年度 10  10  10  30 
2011年度 30  20  10  60 
2010年度 10  12 
2009年度   12 
2007年度    
2006年度      
2008年度   13 
2005年度      
その他の研究活動
海外渡航状況, 海外での教育研究歴
Jamia Millia Islamia大学, India, Japan, 2018.12~2018.12.
トロント大学, ヨーク大学, Canada, Canada, 2018.07~2018.07.
British Columbia University, ブリティッシュコロンビア大学, Canada, 2016.03~2016.03.
日本エジプト開学技術大学, 日本エジプト開学技術大学, Egypt, Egypt, 2015.05~2016.07.
外国人研究者等の受入れ状況
2018.12~2019.09, 1ヶ月以上, エジプト日本科学技術大学, Egypt, MOHE (エジプト政府).
2018.11~2019.07, 1ヶ月以上, エジプト日本科学技術大学, Egypt, MOHE (エジプト政府).
2017.05~2018.02, 1ヶ月以上, エジプト日本科学技術大学, Egypt, MOHE (エジプト政府).
2018.02~2018.10, 1ヶ月以上, エジプト日本科学技術大学, Egypt, MOHE (エジプト政府).
2017.11~2018.07, 1ヶ月以上, エジプト日本科学技術大学, Egypt, MOHE (エジプト政府).
2017.10~2018.06, 1ヶ月以上, エジプト日本科学技術大学, Egypt, MOHE (エジプト政府).
2016.04~2016.04, 2週間以上1ヶ月未満, ETI(エジプト), Egypt, 外国政府・外国研究機関・国際機関.
受賞
2019年度電子情報通信学会無線電力伝送研究会WPTコンテスト~目の前の壁を越えろ!!(最優秀賞), IEICE (電子情報通信学会 無線電力伝送研究会), 2019.03.
BEST ELEX AWARD 2016, 電子通信学会誌, 2017.09.
感謝賞, 在日エジプト大使館, 2008.06.
LETTER OF APPRECIATION, EMBASSY OF NEPAL in TOKYO, 2008.06.
Travel Grant, 青山学院大学, 2004.08.
優勝発表賞, 東京大学, 2003.02.
研究資金
科学研究費補助金の採択状況(文部科学省、日本学術振興会)
2016年度~2016年度, 国際学術研究, 代表, 第4回 日本エジプト電子・通信・計算機に関する国際会議.
2016年度~2018年度, 基盤研究(C), 代表, 第5世代移動通信対応オンチップアンテナ付き異種集積化フロントエンドの開発.
2011年度~2015年度, 基盤研究(B), 代表, ホワイトスペース対応リコンフィギュラブルPAの開発.
2008年度~2010年度, 若手研究(B), 代表, 超低消費電力・超広帯域12bitリングDCOの開発.
2008年度~2012年度, 基盤研究(B), 分担, ユビキタスネットワーク用小型平面アンテナの開発とトランシーバへの実装に関する研究
.
競争的資金(受託研究を含む)の採択状況
2019年度~2020年度, 公益財団村田学術振興及財団, 代表, 200GHz CMOS発振器の開発.
2019年度~2021年度, 公益財団電気通信普及財団, 代表, 200GHz CMOS発振器の開発.
共同研究、受託研究(競争的資金を除く)の受入状況
2015.07~2016.03, 代表, 準ミリ波帯CMOS RF回路の研究.
2014.07~2015.03, 代表, 準ミリ波帯CMOS RF回路の研究.
2013.07~2014.03, 代表, フレキシブルワイヤレスシステム用発振回路の研究.
2013.04~2014.03, 代表, FBARを用いた発信器及びチューナブルPAの設計・評価.
2012.04~2013.03, 代表, FBARを用いた発振器の設計・評価.
2009.07~2010.03, 代表, ソフトウエア無線用リング型超低消費電力・リコンフィギュアラブルDCOの開発』JST地域イノベーション創出総合支援事業 重点地域研究開発推進プログラム H21年度「シーズ(B)発掘試験」(代表) .
2008.07~2009.03, 代表, フィボナッチ数列により最適化された超低消費電力・高速DACの開発.
寄附金の受入状況
2019年度, 公益財法人電気通信普及財団, 助研究成金.
2019年度, 公益財団村田学振振興財団, 助研究成金.
2018年度, 在東京エジプト大使館, 第6回目:教育・研究に関する寄付金.
2018年度, 在東京エジプト大使館, 第5回目:教育・研究に関する寄付金.
2017年度, 在東京エジプト大使館, 第4回目:教育・研究に関する寄付金.
2017年度, 在東京エジプト大使館, 第3回目:教育・研究に関する寄付金.
2017年度, 在東京エジプト大使館, 第2回目:教育・研究に関する寄付金.
2017年度, 在東京エジプト大使館, 第1回目:教育・研究に関する寄付金.
学内資金・基金等への採択状況
2006年度~2007年度, 九州大学COE若手研究者のための研究助成(分野:システムLSIプロジェ
クト), 代表, Development of Compact Size and Low Noise RF Front-End for WLAN On-Chip Implementation.

九大関連コンテンツ

pure2017年10月2日から、「九州大学研究者情報」を補完するデータベースとして、Elsevier社の「Pure」による研究業績の公開を開始しました。
 
 
九州大学知的財産本部「九州大学Seeds集」