担当区分：筆頭著者,　責任著者   記述言語：英語   掲載種別：研究論文（学術雑誌）   出版者・発行元：IEEE Transactions on Circuits and Systems II: Express Briefs  

This brief proposes an on-chip bandpass filter (BPF) that achieves low loss and reduced out-of-band rejection by cascading two resonators and a low pass filtering admittance (J) inverter between them. The proposed J-inverter uses a T-network with negative mutual coupling to generate a transmission zero, and the design equations for this component are provided and verified through circuit simulations. Additionally, a resonator is proposed that utilizes a high impedance line loaded capacitor, and its poles and zeros are thoroughly investigated. Finally, the efficacy of the proposed approach is demonstrated through an on-chip prototype. The measured results show an insertion loss of 3.3 dB at 61 GHz, a 3-dB fractional bandwidth of 25%, and an extended rejection of less than 30 dB between 82 GHz and 115 GHz.

DOI： 10.1109/TCSII.2023.3283532

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記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：IEEE MTT-S International Microwave Symposium Digest  

For sub-terahertz band applications, two compact and low-loss on-chip substrate integrated waveguide (SIW) cavities are designed in CMOS technology. Compact size cavity is achieved by utilizing the folded ridge structure in the quarter mode SIW (QMSIW) structure which is loaded with complementary split-ring resonators (CSRRs). Two prototypes of the proposed QMSIW cavities with and without CSRR are fabricated in 1P6M CMOS technology. From the measurement, both cavities present return losses higher than 27 dB and external Q-factors higher than 140. The proposed work shows that even at such high frequencies, compact and low-loss SIWs can be fabricated in commercial CMOS technology and opens a window to utilizing such cavities for other low-loss components such as oscillators, on-chip bandpass filters and on-chip antennas for sub-terahertz band applications.

DOI： 10.1109/IMS37964.2023.10188161

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記述言語：英語   掲載種別：研究論文（学術雑誌）   出版者・発行元：IEEE Transactions on Antennas and Propagation  

A novel stacked wideband metamaterial is proposed for a robust and compact dual-band wireless power transfer (WPT) system. The proposed metamaterial employs split-ring resonator (SRR) unit cells loaded by nonuniform capacitors. First, two types of unit cells that exhibit two resonance frequencies are analyzed. The results show that it can only improve the coupling between the transmitter (Tx) and the receiver (Rx) at the single band. Then, each unit cell is sandwiched with each other, and a hybrid unit cell that indicates three resonance frequencies is finally proposed. The hybrid SRR exhibits near-zero permeability within the wide frequency range of interest. Therefore, the proposed metamaterial is effective at both bands simultaneously. The system was fabricated and tested, including a compact dual-band WPT system. The size of the Tx (Rx) and the metamaterial is $15\times15$ and $20\times20$ mm, respectively. The measured figures of merit (FOM) are 0.92 at 390 MHz and 0.85 at 770 MHz at a power transfer distance of 20 mm, which is a significant improvement over recently proposed dual-band WPT systems with metamaterials.

DOI： 10.1109/TAP.2023.3262977

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記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：IEEE MTT-S International Microwave Symposium Digest  

Low-loss half-mode substrate integrated waveguide (HMSIW)-based interconnects and transmission lines are designed and implemented in Complementary Metal-Oxide Semiconductor (CMOS) technology. In HMSIW interconnects, complementary split ring resonators (CSRR) whose self-resonance is much higher than the cut-off frequency of the SIW are etched on, due to which matching is improved. By controlling the parameters of the CSRRs, the losses due to microstrip to SIW transition are substantially improved, and no extra external matching circuit is required. A prototype was fabricated in 1P6M CMOS technology and tested. The measured cut-off frequency of the proposed HMSIW transmission line is 110 GHz, and the measured attenuation constant at frequencies of 175-220 GHz is less than 1.4 dB/mm. This work confirms a significant performance improvement of the CMOS interconnects in the sub-terahertz frequency band.

DOI： 10.1109/IMS37964.2023.10188034

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記述言語：英語   掲載種別：研究論文（学術雑誌）   出版者・発行元：IEEE Transactions on Circuits and Systems I: Regular Papers  

A K-band two-stage power amplifier (PA) with capacitive-feedbacked cold-phase compensator (cold-PC) linearizer and power-added-efficiency (PAE) enhancer is introduced in 180-nm CMOS technology. This cold-PC consists of two parts. First, a cold-FET analog pre-distorter (APD) with a new capacitive-feedbacked technique is proposed to improve the linear behavior of the PA by enhancing the corresponding APD's compensation slope. The proposed implementation has a reduced insertion loss and a minimal chip area overhead. Second, a low-pass two-tunable inductive and capacitive PC is proposed to solve the phase shift problem at intermediate nodes that would enhance the PAE of the stacked-transistors configuration. The implemented PA achieves, at 23.5-GHz, a maximum measured PAE of 21.2%, output power at the 1-dB compression point (OP1dB) of 13.4-dBm, and saturated output power of 15-dBm using a total chip area of 0.58 mm2. Employing the proposed cold-PC results in a decrease of the measured error vector magnitude (EVM) of the 400-MHz 5G-NR of 64-QAM modulated signal and an increase of the OP1dB and its PAE by 2.5-dB and 7%, respectively (enhancement by 78% and 72% from the original case, respectively), which, to the best of authors' knowledge, is the highest reported enhancement of the linearizers of k-band PAs.

DOI： 10.1109/TCSI.2022.3205367

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記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：RFIT 2022 - 2022 IEEE International Symposium on Radio-Frequency Integration Technology  

A three-Tunable low-pass π-phase compensator technique is proposed and employed in a K-band CMOS power amplifier (PA) to solve the phase shift problem at intermediate nodes of stacked transistor configurations (STCs). Also, it reduces the effects of harmonic signals that in turns, enhances the overall power added efficiency (PAE) of the PA. The PA consists of two stages i.e. driver and main stages, designed using 2-STCs in 180-nm CMOS technology. The fabricated PA achieved a power gain of 12.8 dB at 23 GHz, a maximum PAE of 18.3%, an output power of 1 dB compression point \left(\mathrm{P}{1 \mathrm{~dB}}\right) of 14.1 1 dBm, and saturated output power \left(\mathrm{P}{\text {sat }}\right) of 16.0 dBm while it consumes chip area of 0.604 mm2 including pads.

DOI： 10.1109/RFIT54256.2022.9882403

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記述言語：英語   掲載種別：研究論文（学術雑誌）   出版者・発行元：IEEE Microwave and Wireless Components Letters  

A two-stage 180-nm CMOS wideband (14-22 GHz) power amplifier (PA) with a superimposed staggered technique and defected-ground-structure (DGS) inductors is introduced, where a wideband peaking main stage is designed at the center frequency; then, a superimposed dual-band (SDB) driver stage is proposed to obtain the optimally flat gain response over the whole bandwidth (BW). Also, DGS inductors are used to enhance the power added efficiency (PAE) of the implemented PA by decreasing the matching circuits' insertion losses. The proposed PA achieved a power gain of 12 dB at a total chip area of 0.564 mm2. Also, at the center frequency, it achieved a saturated output power of 16.6 dBm exhibiting the smallest reported amplitude-to-phase (AM-PM) distortion (2.1°) and group delay (GD) variations (±66 ps). Finally, it gives among the highest fractional bandwidth (FBW) (44.4%) and the PAE (18.7%) so far. Also, it achieves an error vector magnitude of -25 dB at 9.3-dBm output power for a 400-MHz 5G-NR signal.

DOI： 10.1109/LMWC.2022.3189347

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記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：2022 Wireless Power Week, WPW 2022 - Proceedings  

A broadband rectification circuit is usually designed with complex matching circuits to achieve decade and octave impedance which result is the bulkiness of the layout and increases the losses. To mitigate these problems, an ultra-wideband high-efficiency rectification circuit without any inductors and transmission lines at the input section [1] is utilized and employed with 3-bit digitally controlled signals to vary the length of a short stub at the grounding so that reconfigurable operation of the proposed rectifier is obtained in the frequency range of 60 MHz to 3.8 GHz. The proposed compact rectification circuit offers reconfigurable operation over a wide bandwidth and is best suitable for the applications in wirelessly powered multiband and software-defined radios or other portable devices.

DOI： 10.1109/WPW54272.2022.9901332

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記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：IEEE MTT-S International Microwave Symposium Digest  

A novel wideband stacked metamaterial is proposed for a dual-band wireless power transfer (WPT) system. Firstly, two types of split-ring resonators (SRRs) of different self-resonance frequencies are proposed. Then we sandwiched each type of the unit cell. Consequently, the proposed metamaterial exhibits wideband near-zero characteristics on both the real part and imaginary part of the permeability. Also, compared with conventional 1-D metamaterial [2], the proposed metamaterial can significantly empower both bands simultaneously of the dual-band WPT system. An experiment shows that the proposed metamaterial of size (20 mm x 20 mm 5.468 mm) has improved the efficiencies of both bands from 18.6%, 22.9% to 51.8% and 47.8%, respectively, at a wireless power transfer distance of 20 mm.

DOI： 10.1109/IMS37962.2022.9865455

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記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：IEEE MTT-S International Microwave Symposium Digest  

We propose a low magnetic loss multi-ring resonator (MRR) metamaterial. Then, we utilize this MRR metamaterial in a stacked configuration as the WPT transmitter (TX) for a miniaturized receiver (RX) embedded in biomedical tissue. A prototype is fabricated, and the measurement shows an efficiency of 51% at 50 MHz when the TX/RX separation distance is 9 mm. The TX/RX sizes are 20 mm × 20 mm and 7 mm × 7 mm, respectively. Hence, the proposed system has a figure-of- merit of 0.42, which is a significant improvement over the previously reported WPT systems. Also, the simulated specific absorption rate is within the recommended level when the input power is 21 dBm.

DOI： 10.1109/IMS37962.2022.9865438

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担当区分：最終著者   記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：IEEE MTT-S International Microwave Symposium Digest  

Millimeter-wave miniaturized Substrate Integrated Waveguide (SIW) cavity resonator is proposed in 0.18-μm CMOS technology. Miniaturization of the SIW cavity resonator is achieved first by taking 1/16thparts of the standard SIW and employing folded ridge structure. Later this folded ridge sixteenth mode SIW cavity is inductively loaded by a complementary split-ring resonator, which provides internal matching within the cavity resonator. This improved matching enhances the return loss, the external Q-factor, and ultimately, the loaded Q-factor of the proposed cavity resonator. At 60 GHz resonance frequency, the fabricated prototype of the proposed cavity resonator presents a measured reflection coefficient of -33.42 dB, with the external Q- factor 112. Moreover, the active area of the fabricated cavity without measuring pads is only 0.019 mm2.

DOI： 10.1109/IMS37962.2022.9865522

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記述言語：英語   掲載種別：研究論文（学術雑誌）   出版者・発行元：IEEE Microwave and Wireless Components Letters  

This letter proposes a W -band compact cavity resonator for future applications of on-chip bandpass filters (BPFs), oscillators, phase shifters, and so on. To mitigate the leakage from the open sides of a folded ridged quarter-mode substrate integrated waveguide (SIW) cavity, shielding structures made of vias are employed. Two parallel inductive slots are etched on the top metal layer for further size reduction. Later, the one-port cavity is converted to a two-port cavity resonator and utilized in the design of W -band BPF. The proposed design is implemented in a commercial complementary metal-oxide-semiconductor (CMOS) technology, fabricated, and measured. The active size of the proposed cavity resonator is only 99 mu text{m},,boldsymbol {times },,99,,mu text{m} ( 0.054 boldsymbol {lambda }-{mathbf {g}},,{ boldsymbol {times }},,0.054{} boldsymbol {lambda }-{mathbf {g}} ), and the measured insertion loss ( vert S-{21}vert ) is 2.26 dB.

DOI： 10.1109/LMWC.2021.3122149

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記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：Asia-Pacific Microwave Conference Proceedings, APMC  

Millimeter-wave compact, high quality (Q-) Substrate Integrated Waveguide (SIW) cavity is proposed in 0.18-µm CMOS technology. Compact size of the SIW cavity resonator is achieved first by taking 1/16th parts of the standard SIW and employing folded ridge structure. Two prototypes of the proposed cavity resonator with different feeding structures were fabricated and measured. The measurement results present a reflection coefficient lower than -22 dB and the external Q-factor greater than 60 in both cases. Experimentally, it is verified that due to the low losses associated with the top feed structure, it presents better return losses and Q-factor than the transition feed structure. Moreover, the active area of the fabricated cavity resonators without measuring pads are only 0.024 mm2, which is only 0.563% when compared to the standard SIW cavity.

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記述言語：英語   掲載種別：研究論文（学術雑誌）   出版者・発行元：Asia-Pacific Microwave Conference Proceedings, APMC  

An ultrawideband rectifier without an external impedance matching circuit offers many benefits, such as compact circuit size and lower losses. Generally, the rectifier is designed using the conventional voltage doubler circuit, which has varying input impedance for the operating frequency. But, to achieve the wideband rectification, the input impedance of the proposed circuit must be matched with 50 O impedance throughout the desired frequency band. For varying impedance, it is challenging to design the impedance matching network. In [11], the idea of a virtual DC battery is utilized to achieve ultra-wideband rectification without using any external matching at input section. For the further improvement of rectification efficiency, in this work, parallel diode connection is proposed instead of single diode. The proposed design achieved maximum flat conversion efficiency for energy harvesting and wireless power transfer applications.

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記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：2022 52nd European Microwave Conference, EuMC 2022  

A compact size millimeter-wave on-chip defected ground structure (DGS)-based bandstop filter (BSF) is proposed and implemented in 0.18-μm CMOS technology. The proposed BSF is realized with T-shape DGS. In combination with the series resonance circuits, the proposed design realizes two transmission poles: one at either side of parallel resonance. Despite the compact size, the proposed BSF still maintains higher quality (Q) factors and group delay. The proposed BSF optimized at 52 GHz frequency is fabricated and tested. The active area of the fabricated prototype without pads is 0.0129 mm2 which is only 50% of the size of a wideband BSF recently proposed in a similar technology [8] and [16]. The measured loaded and unloaded Q-factors are 4.57 and 20.55, respectively.

DOI： 10.23919/EuMC54642.2022.9924382

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記述言語：英語   掲載種別：研究論文（学術雑誌）  

DOI： 10.1109/TMTT.2018.2852661

記述言語：英語   掲載種別：研究論文（学術雑誌）  

DOI： 10.1109/TCPMT.2018.2861411

記述言語：英語   掲載種別：研究論文（学術雑誌）  

A novel 22-GHz-band oscillator using an integrated defected ground structure (DGS) resonator is presented for quasimillimeter waveband applications. The DGS is etched on the first metal layer (M1) below a 50-Ω microstrip line on the top metal layer (M6) of 0.18-μm one-poly six-metal (1P6M) complementary metal-oxide-semiconductor (CMOS) technology. The proposed oscillator is fabricated using 0.18-μm CMOS technology, and the measured carrier frequency and phase noise are 22.88 GHz and -129.21 dBc/Hz (-108.05 dBc/Hz) at 10-MHz (1 MHz) offset frequency, respectively. The power dissipation is 6 mW that results in a figure of merit to be -188.8 dB. As the DGS resonator could be designed at any high frequency, it may give an alternative design approach of high performance voltage controlled oscillator and frequency synthesizers at K-band and beyond, thus alleviates the problem of self-resonance that a spiral inductor usually encounters at higher frequency.

DOI： 10.1109/LMWC.2018.2801031

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This brief proposes a design methodology based on the admittance (J-) inverters for a dual-band wireless power transfer (WPT) system that employs two cascaded circulars defected ground structure (DGS) resonators with different capacitive loading to guarantee distinct resonances. A single microstrip line excites the two DGSs, and when two DGS resonators are coupled back to back, it transforms to a dual band pass filter leading to WPT at both bands. Each of the DGS resonators has independent coupling. Thus, the realized J-Inverters are designed independently. Also, we employ a single stub for the matching. This stub appears with a different length according to the operating frequency; hence, an independent external coupling is achieved at both frequencies. A compact size of 30 mm × 15 mm is fabricated achieving a WPT efficiency of more than 71% at a power transfer distance of 16 mm for both bands (0.3 and 0.7 GHz).

DOI： 10.1109/TCSII.2017.2740401

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This letter proposes a wireless power transfer (WPT) system using coplanar waveguide fed rectangular defected ground structure (DGS) resonators. One of the advantages of rectangular DGS resonator is that it has higher quality (Q-) and coupling (K-) factor compared to the H-shape or semi-H-shape DGS resonators. When two DGS resonators are coupled back-to-back, it transforms to a bandpass filter with tight coupling, resulting in the transfer of power wirelessly. The fabricated WPT system of size 35.8 mm×20 mm achieves, for the first time, a figure of merit of more than one at a WPT distance from 40 to 44 mm.

DOI： 10.1109/LMWC.2017.2750032

その他リンク： http://ieeexplore.ieee.org/document/8059822/

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This letter presents a 60-GHz ultracompact on-chip bandpass filter (BPF). The designed filter is based on a unique structure, which consists of two overlapped broadside-coupled open-loop resonators, achieving a high level of miniaturization. Moreover, each resonator is loaded by a metal-insulator-metal capacitor to get further miniaturization. Defected ground structure pattern is constructed under the filter structure to enhance the insertion loss (IL). This BPF is designed and fabricated using a standard 0.18-μm complementary metal-oxide-semiconductor technology for millimeter-wave applications. The fabricated BPF chip size is 240 × 225 μm2 including pads. The measured results agree well with the simulation ones and show that the BPF has an IL of 3.3 dB at 59.5-GHz center frequency, and a bandwidth of 12.9 GHz.

その他リンク： http://ieeexplore.ieee.org/document/8010799/

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This paper investigates a possibility of application of a virtual inductor realized by an integrated defected ground structure (DGS) to design a front-end circuit in CMOS technology. Two types of DGS are analyzed and found that the inductance realized by a square-shaped DGS achieves smaller size and higher quality factor than an H-shaped DGS. Then, a 15-GHz low phase noise voltage-controlled oscillator (VCO) employing the proposed square-shaped DGS in 0.18-μm 1P6M CMOS technology is designed. The fabricated VCO operates from 15.2 to 16.12 GHz and consumes 5-mW power. The measured phase noise is -132.08 dBc/Hz at 10-MHz offset frequency, and this results in the figure of merit (FoM) and FoM taking account of the area to be 189.1 and 199.9 dB, respectively.

DOI： 10.1109/JEDS.2017.2728686

その他リンク： http://ieeexplore.ieee.org/document/7984797/

記述言語：英語   掲載種別：研究論文（学術雑誌）  

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This paper presents a novel technique for high efficiency and compact size wireless power transfer (WPT) systems. These systems are based on coupled defected ground structure (DGS) resonators. Two types of DGSs (H-shape and semi-H-shape) are proposed. The semi-H-shaped DGS realizes larger inductance value, and this results in higher WPT efficiency. Instead of using an inductive-fed resonant coupling, we propose capacitive-fed resonant coupling, which reduces the design complexity and enhances the efficiency further. The DGS resonator of both the systems is loaded by chip capacitors for miniaturization. An equivalent circuit using approximate quasi-static modeling is extracted. An analytical design procedure is developed to calculate the optimum design parameters for the proposed WPT systems. The optimized structures are fabricated and measured. The simulation and measurement results are in good agreement. The proposed semi-H-shaped DGS WPT system has a peak efficiency of 73% at a transmission distance of 25 mm. In turn, the figure of merit becomes the highest among the WPT systems proposed so far.

DOI： http://dx.doi.org/10.1109/TMTT.2016.2618919

その他リンク： http://dx.doi.org/10.1109/TMTT.2016.2618919

記述言語：英語   掲載種別：研究論文（学術雑誌）  

his paper presents a new design for wireless power transfer (WPT) systems using asymmetric structures for the transmitter (TX) and the receiver (RX), and the TX/RX are constructed using spiral-strips defected ground structure (DGS) resonators. The proposed spiral-strips DGS resonator overcome the problem of low self-inductance that encountered by H-shape DGS resonator in [1, 2], so that the proposed WPT system that employs the proposed spiral-strips DGS resonators has better efficiency and higher power transmission distance. Design methodology of the proposed WPT system are formulated and fabricated. The measurement results show a WPT efficiency of 78% at a transmission distance of 40 mm with the TX and RX areas of 50 x 50 mm2 and 30 x 30 mm2, respectively.

DOI： http://doi.org/10.1587/elex.13.20160591

その他リンク： http://doi.org/10.1587/elex.13.20160591

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This letter presents a new design for wireless power transfer (WPT) applications using two coupled bandstop filters (BSF). The stopband is created by etching a defected structure on the ground plane, and the power is transferred through electromagnetic (EM) resonant coupling when the two BSFs are coupled back to back. An equivalent circuit model of the proposed WPT system is extracted. Verification of the proposed design is performed through a good agreement between the EM simulation, circuit simulation, and measurement results. The proposed system achieves a measured WPT efficiency of 68.5% at a transmission distance of 50 mm using a compact size (40 x 40mm²). This results in a figure of merit of the proposed system to be 0.856 and the ratio of transmission distance/lateral size is 1.25 that is the highest among the WPT systems proposed so far using planar structures.

DOI： 10.1109/LMWC.2016.2601300

その他リンク： http://dx.doi.org/10.1109/LMWC.2016.2601300

記述言語：英語   掲載種別：研究論文（学術雑誌）  

In this letter, we propose a compact size, small insertion loss 60 GHz on-chip H-shaped resonator bandpass filter (BPF) using 0.18 μm standard CMOS technology. The BPF Size is miniaturized by loading the H-shaped resonator with metal-insulator-metal capacitors at its ends. Besides, two defected ground structure cells are etched under the coupled lines to improve the filter insertion loss. Furthermore, selectivity is enhanced by loading the center of the H-shaped resonator with two unsymmetrical meander line stubs generating two transmission zeroes at 50 and 70 GHz. The fabricated BPF chip size is 240×650 μm2. The measured insertion loss and fractional bandwidth are 2.5 dB at 60 GHz and 21%, respectively.

DOI： 10.1109/LMWC.2016.2597219

その他リンク： http://ieeexplore.ieee.org/document/7542143/?arnumber=7542143

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This letter presents a miniaturized low loss mixed coupled on-chip band-pass filter using overlapped open loop ring resonators and using patterned ground shields. The fabricated prototype shows an insertion loss of 3.7 dB, a return loss > 20 dB, a bandwidth of 13 GHz, and a chip size of 700 μm × 450 μm.

DOI： 10.1002/mop.29650

その他リンク： http://onlinelibrary.wiley.com/doi/10.1002/mop.29650/full

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This paper presents a novel technique to enhance Antenna-on-Chip (AoC) gain by introducing a high resistivity layer below it. Instead of using the costly ion implantation method to increase resistivity, the N-well that is available in the standard CMOS process is used. A distributed grid structure of N-well on P-type substrate is designed such that the P and N-type semiconductors are fully depleted forming a layer with high resistivity. By an electromagnetic simulation, the using depletion layers enhance the antenna gain and radiation efficiency without increasing the occupied area. The simulated and measured |S11| are in fair agreement. The measured gain is –1.5 dBi at 66 GHz.

DOI： 10.1587/elex.13.20151115

その他リンク： https://www.jstage.jst.go.jp/article/elex/advpub/0/advpub_13.20151115/_article

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This letter presents a 60 GHz miniaturized, low loss on-chip bandpass filter (BPF) based on open-loop resonators (OLR). Overlapping of the BPF’s resonators leads to miniaturization and introduces a mixed coupling configuration. Moreover, its resonators are folded to minimize the size and the insertion loss. H-shaped defected ground structures are also used to reduce insertion loss and to improve the out of band rejection. The measured insertion loss, return loss, centre frequency, and bandwidth are 2.85 dB, 18 dB, 59 GHz and 15.5 GHz with a chip size of 368 × 262 um2 including pads.

DOI： 10.1049/el.2015.4465

その他リンク： http://digital-library.theiet.org/content/journals/10.1049/el.2015.4465

記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：IEEE MTT-S International Microwave Symposium Digest  

A method for calculating transition loss in long lowloss substrate integrated waveguide (SIW)-based transmission lines fabricated using commercial complementary metal-oxidesemiconductor (CMOS) technology is presented. To quantify the accurate transition loss, the proposed approach employed twostep de-embedding technique besides normal measurement setup calibration using impedance standard substrate (ISS) at two distinct reference points: the first mitigates measuring pad effects, and the second removes both pads and transition structures. By using the attenuation constants calculated from these reference planes, the intrinsic transition loss is estimated. From the experiment, a low transition loss is observed in the proposed SIW design, which varies between 0.2 dB and 1.3 dB over a wide measurement bandwidth of 120 to 220 GHz. The experimental results underscore the efficacy of the proposed method and suggest the potential for consistent performance above the current measurement threshold of 220 GHz, which could be pivotal for terahertz (THz) applications.

DOI： 10.1109/IMS40175.2024.10600291

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出版者・発行元：IEEE MTT-S International Microwave Symposium Digest  

This paper proposes a metamaterial-inspired absorber designed to enhance isolation in a simultaneous wireless information and power transfer (SWIPT) system through biological tissue. The study delves into the metamaterial perspective, focusing on the characteristics of split-ring resonators (SRRs) within the proposed absorber unit cells. The absorber exhibits a significant real part near -1 and an imaginary part close to 0 in permeability. A 10-mm-thick human body equivalent phantom is used for the SWIPT system's evaluation. Experimental results indicate that embedding this absorber between power and signal ports in both Tx and Rx of a SWIPT system results in a 3 dB improvement in isolation performance. Concurrently, with the assistance of the proposed absorber, the datarate improves by 3.6 Mb/s, allowing signals to be transmitted with 5 dBm weaker power than the original system.

DOI： 10.1109/IMS40175.2024.10600186

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記述言語：英語   掲載種別：研究論文（学術雑誌）   出版者・発行元：International Journal of Electronics  

In this article, a self-bias MOSFET-based dual-resistive feedback low-noise amplifier (LNA) is investigated. A detailed mathematical analysis of the addressed amplifier has been carried out using the return ratio-based feedback analysis technique. Furthermore, the LNAs have been simulated via Cadence using the TSMC 65 nm PDK. Two (Formula presented.) strategies are described to handle the performance trade-offs for enhancing gain, noise figure (NF) and power consumption. The two strategies are conceptually similar to one another, with the selection of the transconductance efficiency being the only difference. While the first technique uses a transconductance efficiency to achieve the lowest power consumption while keeping an acceptable NF, the second strategy uses a particular transconductance efficiency for flawless noise cancelling without consideration for reduced power consumption. According to simulation results, the first recommended LNA has a voltage gain of 12 dB over a 3 dB bandwidth of 0.5–10 GHz, a minimal NF of 1.7 dB @ 7.014 GHz, a maximum NF of 1.932 dB @ 0.5 GHz, consumes 12.42 mW from a low supply voltage of 1.2 V and achieved a third-order intercept of −2.34 dBm @ 1 GHz. The simulation results of the second recommended LNA also show that it can operate with a low supply voltage of 1.2 V and still achieve a minimum NF of 0.978 dB @ 2.729 GHz, a maximum NF of 1.048 dB @ 6 GHz, (Formula presented.) of 1.34 dBm and a voltage gain of 13 dB over a 3 dB bandwidth of 0.5–6 GHz with a consuming power of 25 mW.

DOI： 10.1080/00207217.2024.2384001

Scopus

記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：2023 IEEE Wireless Power Technology Conference and Expo, WPTCE 2023 - Proceedings  

The frequency switching dual power band rectifier is proposed to achieve both low-power and high-power applications from a single circuit. Two different operating frequencies f1 = 900 MHz and f2 = 2.4 GHz are selected for low-power and high-power applications, respectively. The proposed rectifier fulfills stable operation at two levels of input power by making frequency switching. The Schottky diodes HSMS 2850 and HSMS 2860 are selected for f1 and f2, respectively, based on their performance with respect to the input power. Instead of conventional lumped inductors, defected ground structure (DGS)-based inductors are employed in matching circuits. For maximum RF-to-dc conversion efficiency in both low and high-power conditions, two different optimal loads are required, which is achieved from the load-modulation technique by using Bipolar Junction Transistor (BJT). The measurement result of the proposed rectifier shows more than 50% conversion efficiency for the power range -18 dB to 2 dBm and 8 dBm to 20 dBm with circuit size of 35 mm × 30 mm.

DOI： 10.1109/WPTCE56855.2023.10216256

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担当区分：筆頭著者,　責任著者   記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：2023 IEEE Wireless Power Technology Conference and Expo, WPTCE 2023 - Proceedings  

In this work, a new clock and data recovery (CDR) scheme is proposed for amplitude shift keying (ASK) with pulse width modulation (PWM) encoding. Such a technique can fully recover the clock as well as the encoded data without the need for any comparator. The clock is recovered by passing the ASK-PWM encoded data to the frequency divider and frequency multiplier. Then, the data sampler can recover the data by sampling the ASK-PWM modulated data using a delayed version of the recovered clock with no additional processing. This technique is intended for a data transfer system over an inductively coupled wireless power transfer system (WPT) system for biomedical implants where the data will modulate the power carrier without the need for a dedicated data channel. A prototype example implementation of the CDR scheme on a 180 nm Complementary-Metal-Oxide-Semiconductor (CMOS) technology with a data rate of 2 Mbps is provided as a proof-of-concept. This CDR prototype has an area of 8000 μm2 and consumes a power of 129 microwatts from a 1.4 Voltage dc supply.

DOI： 10.1109/WPTCE56855.2023.10215978

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記述言語：英語   掲載種別：研究論文（学術雑誌）   出版者・発行元：2023 35th General Assembly and Scientific Symposium of the International Union of Radio Science, URSI GASS 2023  

Sub-terahertz (sub-THz) band low-loss on-chip substrate integrated waveguide (SIW)-based transmission line interconnects, and cavities are presented and implemented in complementary metal oxide semiconductor (CMOS) technology. SIW cavities are designed with standard and half-mode (HM) SIW structures. Similarly, low-loss SIW interconnect design is implemented by introducing complementary split ring resonators (CSRR) in HMSIW interconnects. The prototypes of the proposed SIW cavities and the interconnects structures are fabricated and experimented in 1P6M CMOS at 200 GHz band. The measurement results of designed SIW cavities present return loss better than 25 dB and the external quality (Q-) factor better than 130 from both designs. Similarly, the HMSIW interconnect presents a measured attenuation constant of less than 1.6 dB/mm at the frequency range of 130-220 GHz band. This works shows that on-chip low-loss SIW-based designs can be implemented in frequency bands like sub-THz and above and can find application for designing transmission lines, filters, oscillators, antennas, etc., for THz applications.

DOI： 10.23919/URSIGASS57860.2023.10265470

Scopus

記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：2022 Wireless Power Week, WPW 2022 - Proceedings  

In this paper, we propose a multiple-input single-output (MISO) wireless power transfer (WPT) system using a stacked meta-surface structure for achieving a high transmission distance. We started by studying two coupled DGS resonators one is a transmitter and the other is a receiver, each resonator is excited by a microstrip line to transfer power at a frequency of 670 MHz. In order to improve the power transfer efficiency, five extra DGS transmitters are employed. Therefore, the proposed multiple-input transmitter is composed of six DGS resonators printed on one layer of a single substrate. On the other side, the receiver is a single DGS resonator. The size of the transmitter and receiver are 46.4mm × 30.7 mm and 15mm × 15 mm, respectively. The stacked meta-surface is in three layers. And the size of it is 25.4mm × 25 mm. In measurement, the WPT efficiency of the MISO system with meta-surface is a maximum of 31.1% higher than that of the MISO system without meta-surface.

DOI： 10.1109/WPW54272.2022.9853985

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記述言語：英語   掲載種別：研究論文（学術雑誌）  

Defected Ground Structure (DGS) based on-chip bandstop filter (BSF) design is proposed for millimeter-wave applications. In the proposed structure, a capacitively loaded T-shape resonator is embedded in the original DGS resonator, which forms two high quality ( ${Q}$ -) factor small loop resonators. Moreover, this structure, in combination with the feedline and series capacitor, independently realizes the position of two transmission poles: one at each side of the parallel resonance without increasing the layout size. The proposed BSF presents a sharp scattering (S-) parameter response due to the appearance of two transmission poles. As a result, the loaded ${Q}$ -factor and negative group delay of the BSF are improved. The prototype of the proposed BSF is fabricated in 0.18- $mu ext{m}$ Complementary Metal-Oxide-Semiconductor (CMOS) process and measured. The measurement result shows a return loss of 1.78 dB at 53.2 GHz center stopband frequency with the negative group delay of 161 pS. The measurement results also agree well with the electromagnetic simulation results. Without pads, the active area of the prototyped BSF is only 0.024 mm2.

DOI： 10.1109/TCSII.2022.3158995

記述言語：英語   掲載種別：研究論文（学術雑誌）  

Defected Ground Structure (DGS) based on-chip bandstop filter (BSF) design is proposed for millimeter-wave applications. In the proposed structure, a capacitively loaded T-shape resonator is embedded in the original DGS resonator, which forms two high quality ( Q -) factor small loop resonators. Moreover, this structure, in combination with the feedline and series capacitor, independently realizes the position of two transmission poles: one at each side of the parallel resonance without increasing the layout size. The proposed BSF presents a sharp scattering (S-) parameter response due to the appearance of two transmission poles. As a result, the loaded Q -factor and negative group delay of the BSF are improved. The prototype of the proposed BSF is fabricated in 0.18- μm Complementary Metal-Oxide-Semiconductor (CMOS) process and measured. The measurement result shows a return loss of 1.78 dB at 53.2 GHz center stopband frequency with the negative group delay of 161 pS. The measurement results also agree well with the electromagnetic simulation results. Without pads, the active area of the prototyped BSF is only 0.024 mm2.

DOI： 10.1109/TCSII.2022.3158995

その他リンク： https://ieeexplore.ieee.org/document/9733395

担当区分：最終著者   記述言語：英語   掲載種別：研究論文（学術雑誌）   出版者・発行元：IEEE Microwave and Wireless Components Letters  

This letter presents a $V$ -band low phase noise voltage-controlled oscillator (VCO) design using a novel integrated two-branches defected ground structure (DGS) resonator in 0.18- $\mu \text{m}$ complementary metal-oxide-semiconductor (CMOS) technology. The proposed DGS resonator is realized in the top metal layer (M6) which has not only a higher quality factor than its predecessors but is also effective to reduce the length of interconnects. The measured carrier frequency and phase noise are 49 GHz and -122.05 dBc/Hz (-102.58 dBc/Hz) at 10-MHz (1-MHz) offset frequencies, respectively. The VCO core consumes 5.5 mW of dc power from the dc supply, which results in a figure of merit (FoM) of -189 dBc/Hz. The proposed VCO using the two-branches DGS resonator may give an alternative low-cost solution for designing a high-performance VCO or frequency synthesizer at $V$ -band and beyond.

DOI： 10.1109/LMWC.2022.3171405

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記述言語：英語   掲載種別：研究論文（学術雑誌）  

This letter presents a V-band low phase noise voltage-controlled oscillator (VCO) design using a novel integrated two-branches defected ground structure (DGS) resonator in 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology. The proposed DGS resonator is realized in the top metal layer (M6) which has not only a higher quality factor than its predecessors but is also effective to reduce the length of interconnects. The measured carrier frequency and phase noise are 49 GHz and -122.05 dBc/Hz (-102.58 dBc/Hz) at 10-MHz (1-MHz) offset frequencies, respectively. The VCO core consumes 5.5 mW of dc power from the dc supply, which results in a figure of merit (FoM) of -189 dBc/Hz. The proposed VCO using the two-branches DGS resonator may give an alternative low-cost solution for designing a high-performance VCO or frequency synthesizer at V-band and beyond.

DOI： https://doi.org/10.1109/LMWC.2022.3171405

その他リンク： https://ieeexplore.ieee.org/document/9773303

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This brief presents a compact and efficient resonance-shift insensitive wireless power transfer (WPT) system. This is possible by using a small electrical length defected ground structure (DGS) resonator, which is found effective against the resonance-shift phenomenon resulted from the higher permittivity of the tissue. Tissue has two undesired effects on a WPT system: (i) reduced coupled quality factor, and (ii) self-resonance shifting that leads to mismatch loss. So, the efficiency of a WPT system degrades in a tissue environment. Then, using the small electrical length DGS, we build a WPT transmitter (TX) using three cooperative DGS resonators to mitigate both issues. The fabricated prototype operates at 49 MHz in the air and tissue. This shows no change in operating frequency when the same receiver (Rx) is kept in the air or embedded inside tissues, which proves the effectiveness of the proposed cooperative DGS-WPT system against the resonance shift. The measured efficiency is 62% when the RX is embedded inside the tissue and is 68% in the air.

DOI： 10.1109/TCSII.2021.3123954

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This brief presents a compact and efficient resonance-shift insensitive wireless power transfer (WPT) system. This is possible by using a small electrical length defected ground structure (DGS) resonator, which is found effective against the resonance-shift phenomenon resulted from the higher permittivity of the tissue. Tissue has two undesired effects on a WPT system: (i) reduced coupled quality factor, and (ii) self-resonance shifting that leads to mismatch loss. So, the efficiency of a WPT system degrades in a tissue environment. Then, using the small electrical length DGS, we build a WPT transmitter (TX) using three cooperative DGS resonators to mitigate both issues. The fabricated prototype operates at 49 MHz in the air and tissue. This shows no change in operating frequency when the same receiver (Rx) is kept in the air or embedded inside tissues, which proves the effectiveness of the proposed cooperative DGS-WPT system against the resonance shift. The measured efficiency is 62% when the RX is embedded inside the tissue and is 68% in the air.

DOI： 10.1109/TCSII.2021.3123954

その他リンク： https://ieeexplore.ieee.org/document/9594096

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This brief proposes the first on-chip bandpass filter (BPF) based on substrate integrated waveguide (SIW) for W-band applications. Slot-loaded, folded ridge and quarter mode technology is used to reduce the cavity size. The coupling characteristic of two folded ridged quarter mode substrate integrated waveguide (QMSIW) cavities implemented in CMOS technology is investigated. A simplified equivalent lumped-element circuit model of the proposed wide-band BPF approach is provided and applied to study the coupling characteristic of slot-loaded folded ridged QMSIW cavity. Then, a novel coupling method using a defected ground structure is proposed to realize a proper coupling intensity for BPF design. Finally, the proposed BPF design is implemented in a commercial complementary metal-oxide-semiconductor (CMOS) technology, fabricated, and measured. The active size of the proposed cavity resonator is only 405 μm×185μm ( 0.22λg×0.1λg ), and the measured insertion loss ( |S21 | ) is 3.15 dB with a central frequency of 85.5 GHz.

DOI： 10.1109/TCSII.2021.3123655

その他リンク： https://ieeexplore.ieee.org/document/9592631

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This brief proposes the first on-chip bandpass filter (BPF) based on substrate integrated waveguide (SIW) for W-band applications. Slot-loaded, folded ridge and quarter mode technology is used to reduce the cavity size. The coupling characteristic of two folded ridged quarter mode substrate integrated waveguide (QMSIW) cavities implemented in CMOS technology is investigated. A simplified equivalent lumped-element circuit model of the proposed wide-band BPF approach is provided and applied to study the coupling characteristic of slot-loaded folded ridged QMSIW cavity. Then, a novel coupling method using a defected ground structure is proposed to realize a proper coupling intensity for BPF design. Finally, the proposed BPF design is implemented in a commercial complementary metal-oxide-semiconductor (CMOS) technology, fabricated, and measured. The active size of the proposed cavity resonator is only 405 μ m ×185μ m (0.22λ g × 0.1 λ g), and the measured insertion loss ( |S 21) is 3.15 dB with a central frequency of 85.5 GHz.

DOI： 10.1109/TCSII.2021.3123655

記述言語：英語   掲載種別：研究論文（国際会議プロシーディングス）   出版者・発行元：Asia-Pacific Microwave Conference Proceedings, APMC  

In this paper, effectiveness of multi-resonance around the parallel resonance of an LC-tank circuit on the reduction of K-band Voltage-Controlled Oscillators (VCOs) phase noise is proposed. The skirt characteristics of the Scattering (|S|) parameters of the resonators is sharpened by introducing transmission poles beside the parallel resonance of the LC-tank circuit. In return, an enhanced the resonator loaded quality (Q) factor without compromising the unloaded Q-factor is obtained. Three designs are realized, verified and compared to the others in a differential VCO topology and the phase noise reduction in post-layout simulations is confirmed. Finally, two chips are fabricated in 0.18-µm CMOS technology and measured.

Scopus

記述言語：その他   掲載種別：研究論文（学術雑誌）  

Generally, a conventional voltage doubler circuit possesses a large variation of its input impedance over the bandwidth, which results in limited bandwidth and low RF-dc conversion efficiency. A basic aspect for designing wideband voltage doubler rectifiers is the use of complex matching circuits to achieve decade and octave impedance and RF-dc conversion efficiency bandwidths. Still, the reported techniques till now have been accompanied by a large fluctuation of the RF-dc conversion efficiency over the operating bandwidth. In this paper, we propose a novel rectification circuit with minimal inter-stage matching that consists of a single short-circuit stub and a virtual battery, which contributes negligible losses and overcomes these existing problems. Consequently, the proposed rectifier circuit achieves a diode physical-limit-bandwidth efficient rectification. In other words, the rectification bandwidth, as well as the peak efficiency, are controlled by the length of the stub and the physical limitation of the diodes.

DOI： 10.1038/s41598-021-99405-7

記述言語：その他   掲載種別：研究論文（学術雑誌）  

To release more flexibility for users to charge their portable devices, researchers have increasingly developed compact wireless power transfer (WPT) systems in recent years. Also, a dual-band WPT system is proposed to transfer power and signal simultaneously, enriching the system’s functionality. Moreover, a stacked metasurface has recently been proposed for a single band near-field WPT system. In this study, a novel multimode self-resonance-enhanced wideband metasurface is proposed for a robust dual-band WPT system, which significantly improves the performance of both bands. The size of the transmitter (Tx) and the receiver (Rx) are both 15 mm × 15 mm only. The proposed metasurface can improve efficiency from 0.04 up to 39% in the best case. The measured figure of merit (FoM) is 2.09 at 390 MHz and 2.16 at 770 MHz, respectively, in the balanced mode. Especially, the FoM can reach up to 4.34 in the lower mode. Compared to the previous state-of-the-art for similar applications, the WPT performance has significantly been improved.

DOI： 10.1038/s41598-021-01677-6

その他リンク： https://www.nature.com/articles/s41598-021-01677-6

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a novel design for a compact dual-band wireless power transfer (WPT) system through biological tissues using dual-reference defected ground structure (DGS) resonators. Overlapping is used to minimize the size to be suitable for biomedical applications. The proposed DGS resonator exhibits bandstop characteristics at two different frequencies depending on the excitation reference-plane. Then, two coupled sets of the proposed dual-reference DGS, in a back-to-back configuration, achieves a dual-band WPT system. The sizes of the receiver and transmitter are 15 mm × 15 mm and 18 mm × 18 mm, respectively. The measured efficiencies are 60.3% at 381 MHz and 54.3% at 750 MHz when the receiver is embedded in chicken breast within a depth of 10 mm, while the overall WPT distance of 11 mm

DOI： 10.1109/IMS19712.2021.9574938

記述言語：英語   掲載種別：研究論文（その他学術会議資料等）  

This paper proposes a three-layers stack metasurface first, and then employed it to a compact double-band wireless power transfer (WPT) system. For the proposed dual-band WPT system, the metasurface exhibits the wide-band characteristic of the negative-near-zero permeability from 222 MHz to 889 MHz, where the transmission efficiency improves significantly at longer WPT distance at the lower band. Only a unit cell is stacked in three layers so that the size of the proposed metasurface has significantly reduced compared to a conventional metasurface where several unit cells are arranged in 1-D topology. The size of the proposed WPT system and the metasurface is 15 x15 mm and 20 x20 mm, respectively. Also, capacitors with the value of 0.1pF are etched on the gaps of the metasurface. The measured efficiencies' improvement ratios are 1.13 at 390 MHz in the air, where the WPT distance is significantly improved from 19 mm to 23 mm.

DOI： 10.1109/WPTC51349.2021.9458177

記述言語：英語   掲載種別：研究論文（学術雑誌）  

A standard substrate integrated waveguide (SIW)-based bandpass filter (BPF) suffers from bulkiness that limits its application in the implementation of compact size low phase noise oscillator. Instead, in this letter, an eighth mode SIW (EMSIW) resonator-based BPF is utilized to realize a miniaturized low phase noise oscillator for X -band applications. Additionally, an equivalent circuit model of EMSIW-BPF is presented. A compact feedback-type oscillator prototype using EMSIW-BPF is designed and fabricated for the first time with a circuit area of just 1092 mm2. The experimental results of the prototype show a phase noise of -126.13 dBc/Hz at 1 MHz offset from 9.97 GHz oscillation frequency with an output power of 3.17 dBm.

DOI： 10.1109/LMWC.2021.3064602

記述言語：英語   掲載種別：研究論文（学術雑誌）  

A voltage-controlled oscillator (VCO) is usually designed by maximizing the quality (Q-) factor of the LC-tank resonator to realize a low phase noise. For the same frequency, the ratio of C/L affects the loaded Q-factor (QL) and then phase noise of the VCO. This affect has not been considered so far in the design of VCO because the conventional on-chip spiral inductor cannot be optimized for C/L ratio. This brief first investigates the effects of C/L ratio on the phase noise, and a design methodology for optimized C/L ratio using defected ground structure (DGS) resonator is presented. Then, the resonators were further evaluated based on LgL-product simulation for a fixed Ibias. Employing the proposed resonator, a very low phase noise KUband VCO is designed and implemented in 0.18-lm CMOS technology. The measurement result shows that the proposed VCO has a phase noise of -110.77 dBc/Hz at 1 MHz offset of 17.5 GHz carrier frequency and a frequency tuning range of 8.7%. The VCO consumes 2.3 mW power, which results in a figure of merit (FoM) of -191.95 dB.

DOI： 10.1109/TCSII.2021.3079309

その他リンク： https://ieeexplore.ieee.org/document/9428594

記述言語：英語   掲載種別：研究論文（学術雑誌）  

Conventional resonant inductive coupling wireless power transfer (WPT) systems encounter performance degradation while energizing biomedical implants. This degradation results from the dielectric and conductive characteristics of the tissue, which cause increased radiation and conduction losses, respectively. Moreover, the proximity of a resonator to the high permittivity tissue causes a change in its operating frequency if misalignment occurs. In this report, we propose a metamaterial inspired geometry with near-zero permeability property to overcome these mentioned problems. This metamaterial inspired geometry is stacked split ring resonator metamaterial fed by a driving inductive loop and acts as a WPT transmitter for an in-tissue implanted WPT receiver. The presented demonstrations have confirmed that the proposed metamaterial inspired WPT system outperforms the conventional one. Also, the resonance frequency of the proposed metamaterial inspired TX is negligibly affected by the tissue characteristics, which is of great interest from the design and operation prospects. Furthermore, the proposed WPT system can be used with more than twice the input power of the conventional one while complying with the safety regulations of electromagnetic waves exposure.

DOI： 10.1038/s41598-021-84333-3

記述言語：英語   掲載種別：研究論文（学術雑誌）  

In this brief, we realize a simultaneous wireless power and information transfer (WPIT) system using co-existing coupled defected ground structure (DGS) resonators. First, co-existing DGS resonators are utilized in the design of simultaneous band stop filter (BSF) responses. Then, coupling two sets of co-existing DGS-BSFs achieves simultaneous WPIT. The DGS resonators have spiral elliptical-shape and share the same ground plane. The coupling characteristics are studied to improve the kQ-product of power carrier and reduce the cross-coupling with the Information carrier. A prototype is fabricated having a size 30 mm imes15 mm for both transmitter (TX) and receiver (RX). The separation between TX and RX is 15 mm. At this separation, the measured efficiencies are 71% and 66% at 49.6 MHz and 149 MHz, respectively, and the isolation between the power channel TX and the information channel RX is 39 dB at 49.6 MHz.

DOI： 10.1109/TCSII.2020.3016385

記述言語：英語   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a C-band low phase noise oscillator using small size low-profile substrate integrated waveguide (SIW) resonator for RF applications. A compact 6 GHz SIW resonator size is possible by introducing ?g/4 resonating slots. A size reduction of 29.87% is achieved while maintaining the quality factor. Also, the impedance of the SIW resonator is controlled by appropriate selection of the location of these introduced slots; which advantages for the conjugate matching between SIW resonator and the active device and removes the need of matching circuit between them. Then, a C-band oscillator prototype utilizing the proposed compact SIW resonator is designed, fabricated and measured. The measured results shows a phase noise of -122.11 dBc/Hz at 1 MHz offset with an output power of -4.2 dBm at 5.96 GHz oscillation frequency.

DOI： 10.23919/EuMC48046.2021.9338129

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This letter introduces two concentric open-loop spiral resonators (OLSRs) that are used to improve magnetic field for nonradiative wireless power transfer (WPT) systems. OLSRs are fed through metal-insulator-metal (MIM) capacitive coupling using a 50 Ω microstrip transmission line. First, a single OLSR is designed and implemented for WPT, then two OLSRs are used instead of a single OLSR to emphasize the surface current on the spiral resonators. Therefore, it helps to intensify the electromagnetic field in order to get a high transmission distance or higher efficiency. The proposed WPT system operates at 438.5 MHz with a measured power transfer efficiency (PTE) of 70.8% at a transmission distance of 31 mm and a design area of 576 mm2. An equivalent circuit of the proposed WPT system is presented as a heuristic approach to show the electrical behavior of the WPT system.

DOI： 10.1109/LMWC.2020.3016136

記述言語：英語   掲載種別：研究論文（その他学術会議資料等）  

For the first time, we propose a combination of coupled defected ground structure (DGS) resonators for wireless power transfer and coupled Figure-8 inductors for information transfer. This combination allows the realization of a simultaneous compact wireless power and information transfer (WPIT). Each set of the DGS resonators and the Figure-8 inductors are located on the same plane. However, they show negligible coupling due to the coupling cancellation mechanism of the Figure-8 inductors. Hence, high isolation can be achieved between the power and information channels. A prototype is fabricated for operation at 50 MHz and 100 MHz. The overall area of the TX/RX is 30 mm × 30 mm and are separated by 14 mm. The measured efficiencies are 78% and 76% at 50 MHz and 100 MHz, respectively, and the isolation is more than 34 dB.

DOI： 10.1109/IMS30576.2020.9223866

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This work presents a new structure of center tap (CT) inductor to improve the performance of Ku-band voltage-controlled oscillators (VCOs). Conventional CT inductor provided by the foundry suffers from a poor-quality ( Q -) factor large area and low self-resonance frequency. These problems are solved by introducing a coupling structure. For the proposed CT inductor, despite its size is miniaturized by 51%, the Q -factor is increased by 41% in the frequency range of 5-30 GHz compared to a conventional CT inductor. The measured differential inductance and quality factor of the proposed inductor are 385 pH and 22 at 12 GHz. The proposed CT inductor is used to design a compact and wide-tuning-range VCO at Ku-band in 0.18- mu ext{m} complementary metal-oxide-semiconductor (CMOS) technology, and this leads to 5.8 dB phase noise improvement compared to the use of a conventional CT inductor. The fabricated VCO has a compact core size of 140 mu ext{m},, imes400,,mu ext{m} only. The VCO chip oscillates from 11.7 to 13.7 GHz. The measured phase noise is -107.7 dBc/Hz at 1-MHz offset frequency at a carrier frequency of 13.7 GHz, and the dc power consumption of the VCO core is 4 mW which results in a figure of merit (FoM) normalized to the die area (FoM _{mathrm {A } } ) to be -197 dBc/Hz.

DOI： 10.1109/LMWC.2020.3004753

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This work proposes a new theory to reduce the phase noise of K-band Voltage-Controlled Oscillators (VCOs) in Complementary Metal Oxide Semiconductor (CMOS) process by introducing one or more transmission poles around the parallel resonance of an LC-tank circuit. Introduction of transmission poles beside the parallel resonance of the LC-tank circuit sharpens the skirt characteristics of the Scattering (S) parameters of the resonators. In return, sharp S-parameters slope enhances the resonator loaded quality (Q) factor without compromising the unloaded Q-factor. In addition, the transmission pole can be realized near the second harmonic of the oscillation. This allocation of the transmission pole leads to the cancellation of this second harmonic and a further reduction of the phase noise. The proposed theory is verified by three different designs based on defected ground structure (DGS) resonators. These designs realized a low-band transmission pole before the parallel resonance, a high-band transmission pole after the parallel resonance, and dual-band transmission poles around the parallel resonance. First, each design is verified and compared to the others using circuit and electromagnetic simulations to establish the Q-factor improvement. Then, each of the resonators is utilized in a differential VCO topology and the phase noise reduction in post-layout simulations is confirmed. Finally, two chips are fabricated in 0.18-μ m CMOS technology and measured. The measurement results are in good agreement with the simulations, which confirm our claim about the proposed theory.

DOI： 10.1109/TCSI.2020.2965007

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This letter presents the improvement of the phase noise (PN) of a voltage-controlled oscillator (VCO) by using a defected ground structure (DGS) resonator with a high-band transmission pole. The proposed DGS resonator has two loops in a coplanar stripline topology. The outer loop is loaded by a series capacitance, which produces the high-band transmission pole. The overall combination has a parallel capacitor to generate the necessary parallel resonance for the VCO operation. This proposed DGS resonator has a sharper impedance and frequency response slope, which results in an improved quality factor. In return, utilization of this DGS resonator into a KU-Band VCO reduces its PN. The prototyped VCO in 0.18-µm CMOS oscillates at 15.52 GHz and shows a PN of −111.27 and −134.07 dBc/Hz at 1- and 10-MHz offset, respectively, while consuming 3.3-mW power. The VCO has a frequency tuning range of 9.5%, which results in a figure of merit (FoM) of −192.7 dB.

DOI： 10.1109/LMWC.2019.2950525

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

In this paper, to characterize the effect of interconnects inductance on VCO's phase noise precisely, two K-band VCO circuits that employ DGS as an inductor are designed and analyzed. It's shown that not only the quality factor of the inductor in resonator has a significant effect on VCO's phase noise, the parasitic inductance of the interconnecting transmission lines will also inflect the phase noise severely. To get the Quantitative analysis, a K-band (25 GHz) VCO is implemented in the 0.18-mu mathrm{m} 1P6M CMOS process and measured.

DOI： 10.1109/APMC46564.2019.9038781

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This letter presents a separation-misalignment insensitive wireless power transfer (WPT) system. This insensitivity is possible by minimizing the variation of mutual inductance. The transmitter (TX) of the proposed WPT system uses a two-plane printed inductor, and the receiver (RX) is a single-plane one. The TX encloses the RX to achieve minimal mutual inductance variations. Hence, the lost mutual inductance due to the misalignment between the RX and one of the TX inductors is compensated by getting close to/moving away from the other TX inductor. Furthermore, admittance inversion and compensation networks are designed to compensate for the remaining variations. Then, we design and fabricate a prototype at 50 MHz. Each TX inductor has an area of 50 text {mm} × 50 mm and an initial separation of 30 mm from the 25 text {mm} × 25 mm RX. The measured efficiency ranges between 72.5% and 80.5% for the separation of ±20 mm from the initial position.

DOI： 10.1109/LMWC.2019.2935621

記述言語：その他   掲載種別：研究論文（学術雑誌）  

We propose a dual-band wireless power transfer (WPT) system employing a dual-mode inductor. The dual-mode inductor is possible through enforcing a self-resonance condition by loading an inductor in series by a tank circuit. In return, two distinct resonances are achieved, simultaneously, utilizing a single compensation capacitor as the inductance of the dual-mode inductor appears with a smaller value after its self-resonance. Also, by maintaining the same mutual coupling, the coupling coefficient becomes larger at the higher resonance, which allows for the employment of the same source/load admittance inversion network to achieve maximum power transfer at both of the operating frequency bands, concurrently. We verify the operation by fabricating a dual-band WPT system, which shows measured efficiencies of 70% and 69% at 90.3 MHz and 138.8 MHz, correspondingly. The size of the WPT system is oldsymbol {50} oldsymbol { imes } oldsymbol {50} mm ^{oldsymbol {2 } } and has a transfer distance of 40 mm.

DOI： 10.1109/TCSII.2018.2883671

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This letter presents a new compact dual-band wireless power transfer (DB-WPT) system. The proposed system is based on two individual transmitting (TX) and receiving (RX) structures. Each structure consists of two interlaced resonators to achieve compact size. A single microstrip line loaded by a surface mounted capacitor (SMD) is used for power feeding. Moreover, high miniaturization of the TX/RX structures is achieved by SMD capacitor loading. In the proposed DB-WPT system, power is transferred from/to the source/load through electromagnetic resonant coupling between the TX and the RX structures. An equivalent circuit of the proposed DB-WPT system is extracted, and then the optimized structures are fabricated and measured. The measured results are in good agreement with the simulated ones. The proposed DB-WPT system has a peak efficiency of 80% and 73% at a transmission distance of 17 mm for frequency 300 and 675 MHz, respectively.

DOI： 10.1109/LMWC.2019.2917747

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a complex conjugate impedance matching technique taking account of the electric properties of biological tissues during power transfer. Output impedance of a wireless power transfer (WPT) system depends on the electrical property of tissues where the system is being used. So, impedance mismatch between Rx and rectifier occurs when the system optimized for air is used in biological tissues. First, the system is matched in the air and later, impedance mismatch is estimated when the same system is being used in chicken which is later compensated. The proposed matching technique will bring back the rf-dc power conversion efficiency (PCE) very close to that of the system being used in the air. Experiment was carried out in three different cases where PCE is 49.53% in the air, 30% in chicken with the conventional conjugate matching and 45.5% in the chicken using the proposed matching technique.

DOI： 10.1109/mwsym.2019.8700821

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

For the first time, a triple-band near-field wireless power transfer (WPT) system is presented using coupled triple-band defected ground structure (DGS) bandstop filters (BSF). A triple-band DGS-BSF is possible through creating a frequency dependent effective inductance, which appears with lower inductance at higher frequencies. When we couple two triple-band DGS-BSFs in a back-to-back configuration, a triple-band DGS-WPT system is created. We verify the proposed DGS-WPT system through good agreements between electromagnetic simulations and measurements. The measured WPT efficiencies are 68%, 60%, and 65% at 100.8 MHz, 140.7 MHz, and 182.2 MHz, respectively at a WPT separation distance of 30 mm. Each of the WPT transmitter and receiver has a size of 50 × 50 mm.

DOI： 10.1109/mwsym.2019.8700853

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

Recently, research on multiband wireless power transfer (WPT) systems has drawn attention high efficiency in the air with a small package of WPT size for the possible bio-related application. However, the WPT system itself is not complete without complementary circuit to convert the received RF power to DC. Thus, this paper presents a design method of integrating a predesigned dual-band WPT system to a voltage-doubler (VD) without external circuit configuration. The method proved to be working as experiment RF-DC conversion efficiency recorded to be 35.2% and 37.9% in both bands, respectively with 20 mm working distance through skin,-1.27% and-1.6% dropped from air condition.

DOI： 10.1109/WISNET.2019.8711815

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This work proposes a new theory to improve the phase noise of a Voltage-Controlled Oscillator (VCO) by introducing dual series resonances around the parallel resonance of an LC-tank circuit. The overall circuit has an improved susceptance slope parameters, which results in the improvement of quality (Q-) factor. Later, its effectiveness is demonstrated to design a low phase noise K-band VCO. The proposed characteristics are realized by a compact defected ground structure (DGS) resonator in a coplanar strip line (CPS) topology. The DGS is loaded by a capacitor, and this combination introduces the parallel resonance. The CPS signal line is implemented with high characteristic impedance to introduce a series inductance. Then, a gap in the CPS is introduced with a loading series capacitance forming a series resonance circuit with the CPS inductance. The overall combination of the series and parallel resonance circuits allowed the targeted two series resonances before and after the parallel resonance. The design is implemented in 0.18-μm CMOS technology, and the post-layout simulation shows that the VCO has a phase noise of -112.31 dBc/Hz @1 MHz offset of 22.07 GHz oscillation, which is 2.3 dB improvement compared to single series resonance VCO. The VCO consumes 4 mW power resulting in a figure of merit (FoM) of -193.2 dB.

DOI： 10.1109/ISCAS.2019.8702264

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a compact dual-band wireless power transfer (WPT) system using overlapped defected ground structure for biomedical applications. One band for power and another for data transfer. The proposed defected ground structure can channel two distinct resonant frequencies. As a result, the fabricated WPT device has almost 50% reduction in the size without changing other performances compared to ref. [9]. The fabricated device is 15 mm ×15 mm. The measured efficiency is 71% and 73%, respectively at 0.45 GHz and 0.95 GHz at WPT distance of 12.5mm.

DOI： 10.1109/WPT.2018.8639281

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This work presents a dual-band wireless power transfer (WPT) system with high figure of merit (FoM). One band can be used for power transfer and another for data transfer in biomedical applications. A Bow-tie Defected Ground Structure (DGS) resonators with high quality (Q-) factor and coupling (k-) factor is utilized for ensuring high efficiency. An equivalent circuit model using the admittance (J-) inverters is utilized to design the admittance inversion and compensation networks. The measured result shows that the proposed WPT system is able to transfer the power at both of the bands with a highFoM, making a suitable candidate for compact near filed WPT applications.

DOI： 10.1109/WPT.2018.8639134

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

A novel technique for a low phase noise and compact K-band Voltage-Controlled Oscillator (VCO) using multi-layers DGS resonator is proposed. The proposed DGS resonator realizes an additional series resonance at the higher side of parallel resonance frequency, and this results in improving both the active and loaded quality factor of the resonator. The proposed resonator has active quality factor of 130 and a compact size of 0.009 mm 2 (0.000459 ? 2 ). Using the proposed DGS resonator in the VCO causes 9 dB improvement in the phase noise compared the VCO implemented using the conventional LC resonator. Two VCOs are designed using the method to illustrate the effect of the series resonance. The first VCO is designed three layers DGS resonator and the other VCO using two layers DGS resonator. The designs are implemented in 0.18 µm CMOS technology and consume 2.9 mW power, and from the post layout results, the first proposed VCO oscillates from 19.6 to 21.3 GHz (8.3 %) and has a phase noise of -113.2 dBc/Hz at 1 MHz offset frequency, and this results in the figure of merit (FoM) and FoM taking account of the tuning range to be -194.4 and -192.7 dB, respectively. The second VCO has a tuning range of 6.1 % and phase noise of -114 dBc/Hz @ 1 MHz offset at 19.6 GHz oscillation.

DOI： 10.1109/MWSCAS.2018.8623874

記述言語：その他   掲載種別：研究論文（学術雑誌）  

A high selectivity compact size coupled open-loop resonator (OLR-) band pass filter (BPF) in 0.18 µm TSMC Complementary Metal Oxide Semiconductor (CMOS) with low insertion (IL) is presented in this manuscript. First, shape optimization and folding are used to guarantee compact size. Then, high performance of the proposed BPF is obtained by virtually increasing the height of the oxide between the OLR’s traces and their ground plane. This virtual increase in the oxide height is realized by etching large slot areas below each of the OLRs. Consequently, the traces are characterized by wider width which in return exhibit lower attenuation constant and hence lower IL. The simulated and measured responses have a very good agreement. The fabricated BPF shows an IL of 3.5 dB at 59 GHz with a return loss of 15 dB and a fractional bandwidth of 16.5%. The fabricated chip has an area of 378 × 430 µm 2 including the measurements pads.

DOI： 10.2528/pierm18101608

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This paper presents a new type of a low-loss miniaturized coplanar-waveguide (CPW) transmission line (TL) by employing distributed loading, capacitors and inductors, in 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology. The capacitors are realized by vertical parallel plates made of vias, and a group of open stubs inserted to the signal line, whereas the inductors are realized by high impedance lines. Then, the proposed CPW-TL is employed to design a miniaturized millimeter wave ultra-wideband low-loss Wilkinson power divider/combiner (WPD/C). The proposed distributed loading results in reducing each WPD/C arm length by more than 50% without changing its characteristic impedance and insertion loss (IL). The design is fabricated in 0.18-μm CMOS technology and tested. The measured results show a wideband performance from dc to 67 GHz with 1-dB IL and isolation greater than 15 dB from 36 to 67 GHz. In addition, the fabricated WPD/C achieves an excellent amplitude imbalance and phase imbalance of less than 0.16 dB and 0.45°, respectively. The core chip size is 336 × 165 μm 2 , which is almost 32.8% compact compared to the recently proposed WPD in the same technology.

DOI： 10.1109/TMTT.2018.2873381

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

We analyze the quality factor (Q_U/Q_K) of three different types of defected ground structure (DGS) resonators including a series resonance in addition to the parallel one. Then, we implement the resonators to design high-performance K-band VCOs in 0.18μ CMOS Technology and finally, a low phase noise VCO at K-band is introduced.

DOI： 10.1109/RFIT.2018.8524088

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This paper methodizes efficiency improvement during lateral misalignment for the wireless power transfer (WPT) system using two coupled semielliptic defected ground structure (DGS) resonators. We design the WPT system using a scaled value of the available mutual coupling between the resonators at perfect alignment. This scaled mutual coupling value enforces over-coupling regime, and the WPT efficiency is lower than the peak one. Then, during lateral misalignment, WPT efficiency improves until it peaks at critical coupling. Next, with further misalignment, the efficiency drops as the system enters loose coupling regime. The proposed method consists of two steps. First, we derive an analytical approach to determine the scaled mutual coupling value for efficiency design during lateral misalignment, and second, we improve the maximum obtainable efficiency by careful designing of the DGS structures' profile. We verify the proposed method by implementing the WPT system at 300 MHz, which shows a peak efficiency of 80% for a size Do × Do = 40 × 40 mm2 with a transfer distance d = Do. During misalignment, the efficiency is higher than 50% for a lateral shift up to ±0.75 Do.

DOI： 10.1109/TMTT.2018.2852661

記述言語：その他   掲載種別：研究論文（学術雑誌）  

In this paper, we propose a compact on-chip 60-GHz bandpass filter (BPF) in complementary metal-oxide-semiconductor (CMOS) technology. The CMOS BPF employs a tapped-line combline configuration with folding and overlapping to achieve a compact size. The combline BPF is realizable with low insertion loss (IL) due to capacitive loading, which reduces the physical length of the resonators and consequently reduces the resulting attenuation. Finally, defected ground slots are implemented in the ground plane under the coupled arms for additional performance enhancement and to achieve more size compactness. The measured IL and return loss of the fabricated prototype BPF are 3.2 and 31 dB, respectively, at a center frequency of 59 GHz with 14 GHz of bandwidth. The core chip area is 0.0165 mm2 ( 0.002× λ -g2 ), which is the smallest BPF so far in the used technology.

DOI： 10.1109/TCPMT.2018.2861411

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper discusses the probability of improving the degree of freedom in implementing wireless power transfer (WPT) systems. This is possible by utilizing the defected ground structures (DGSs). The WPT efficiency can be increased by optimizing the coupling coefficient (K) between the transmitter and the receiver, and the quality (Q-) factor of them. DGSs can be implemented in different shapes; hence, the K and Q-factor of these DSGs are realized with different values depending on the DGS shape. In return, the achievable WPT efficiency can be maximized by careful selection of the DGS shape and dimensions depending on the system efficiency and distance requirements.

DOI： 10.1109/IMaRC.2017.8449719

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This paper presents a high-efficiency CMOS rectifier based on an improved dynamic threshold reduction technique (DTR). The proposed DTR consists of a clamper circuit that biases the gates of pMOS diode switches through a capacitor and diode-connected pMOS transistor. The clamper is used to insert a negative dc level to the input RF signal; therefore, more negative RF signal can be obtained to bias the gates of the main rectifying pMOS devices during its conduction phase. This mechanism reduces the threshold voltage of the main pMOS transistors and increases their sensitivity to the RF input signal. The proposed rectifier is implemented in a 0.18-μm CMOS technology and tested. The measurement shows a peak power conversion efficiency of 86% and an output voltage of 0.52 V at an input power of-16.5 dBm and an input frequency of 402 MHz. The core area of chip excluding measurement pads is 0.024 mm2

DOI： 10.1109/ACCESS.2018.2866457

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a wireless power transfer (WPT) system to transfer power through the tissues using Defected Ground Structure (DGS) resonators. The proposed DGS resonator is made of a spiral structure at the ground plane to increase the quality (Q-) factor, and when two DGS resonators are coupled back to back, it transforms to a bandpass filter resulting in the wireless power transfer. Experiment on the proposed WPT system shows an efficiency of 67.7% in air and 61% when placed in the tissue environment at 20MHz frequency.

DOI： 10.1109/IMBIOC.2018.8428951

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

In this paper, a new theory to improve the phase noise of a Voltage-Controlled Oscillator (VCO) utilizing dual series and parallel resonance to improve the susceptance slope parameter of the resonator circuit is proposed, and its effectiveness is demonstrated to design a low phase noise K-band VCO. The proposed dual resonance is realized using a compact defected ground structure (DGS) resonator, which achieve the additional series resonance by loading its transmission line by a series capacitor. The resulting susceptance slope, and active quality (Qk-) factor of the resonator circuit enhance that, in returns, improves the phase noise by 3.2dB of the same circuit without the series resonance. The design is implemented in 0.18 μm CMOS technology, and the post-layout simulation results show that VCO has a tuning range of 3.4%, and low phase noise with - 111.9 dBc/Hz @1 MHz offset at 21.04 GHz oscillation. The VCO consumes 7.5 mW power resulting in a FoM of -188.7 dB.

DOI： 10.1109/ISCAS.2018.8351670

記述言語：その他   掲載種別：研究論文（学術雑誌）  

A novel 22-GHz-band oscillator using an integrated defected ground structure (DGS) resonator is presented for quasi-millimeter waveband applications. The DGS is etched on the first metal layer (M1) below a 50-Ω microstrip line on the top metal layer (M6) of 0.18-μm one-poly six-metal (1P6M) complementary metal-oxide-semiconductor (CMOS) technology. The proposed oscillator is fabricated using 0.18-μm CMOS technology, and the measured carrier frequency and phase noise are 22.88 GHz and-129.21 dBc/Hz (-108.05 dBc/Hz) at 10-MHz (1 MHz) offset frequency, respectively. The power dissipation is 6 mW that results in a figure of merit to be-188.8 dB. As the DGS resonator could be designed at any high frequency, it may give an alternative design approach of high performance voltage controlled oscillator and frequency synthesizers at K-band and beyond, thus alleviates the problem of self-resonance that a spiral inductor usually encounters at higher frequency.

DOI： 10.1109/LMWC.2018.2801031

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

In this paper, a broadband printed dipole antenna (PDA) with improved radiation characteristics is presented for the next fifth-generation (5G) applications. A broadband integrated balun is used to feed the dipole, which consists of a folded microstrip line and an elliptical slot. Antenna radiation characteristics improvement is obtained thanks to triangle shaped dipole, which stimulates the electromagnetic fields to gather in the end-fire direction and consequently enhances the antenna gain. The proposed design is validated by experimental measurements. The designed antenna bandwidth covers from 26.3 to 40 GHz including the dual 5G bands of 28/38 GHz. The proposed antenna provides almost end-fire patterns, relatively flat gain, and high radiation efficiency through the frequency band.

DOI： 10.1109/RWS.2018.8304959

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This brief proposes a design methodology based on the admittance (J-) inverters for a dual-band wireless power transfer (WPT) system that employs two cascaded circulars defected ground structure (DGS) resonators with different capacitive loading to guarantee distinct resonances. A single microstrip line excites the two DGSs, and when two DGS resonators are coupled back to back, it transforms to a dual band pass filter leading to WPT at both bands. Each of the DGS resonators has independent coupling. Thus, the realized J-Inverters are designed independently. Also, we employ a single stub for the matching. This stub appears with a different length according to the operating frequency; hence, an independent external coupling is achieved at both frequencies. A compact size of 30 mm × 15 mm is fabricated achieving a WPT efficiency of more than 71% at a power transfer distance of 16 mm for both bands (0.3 and 0.7 GHz).

DOI： 10.1109/TCSII.2017.2740401

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

In the paper, we propose a novel voltage-controlled oscillator (VCO) employing defected ground structure (DGS) band stop filter (BSF). The VCO operates from 15.24 GHz to 15.86 GHz. A square shaped DGS etched at the lowest metal layer (M1) below 50-Ohm microstrip line on the top metal layer (M6) of 0.18 μm 1P6M CMOS process. The proposed square-shaped DGS resonator achieves smaller size and higher quality factor than those of a conventional spiral inductor resonator at Ku band frequency. The power dissipation of the VCO is 4 mW. The measured carrier frequency and phase noise are 15.76 GHz and-127.57 dBc/Hz (104.25 dBc/Hz) at 10 MHz (1 MHz) offset frequency, respectively. The measured figure of merit (FoM) is 182.9 dB. The fabricated chip core VCO size is only 0.084mm2 which increases figure of merit (FoMa) to 194 dB.

DOI： 10.23919/EuMC.2017.8230959

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This letter proposes a wireless power transfer (WPT) system using coplanar waveguide fed rectangular defected ground structure (DGS) resonators. One of the advantages of rectangular DGS resonator is that it has higher quality (Q-) and coupling (K-) factor compared to the H-shape or semi-H-shape DGS resonators. When two DGS resonators are coupled back-to-back, it transforms to a bandpass filter with tight coupling, resulting in the transfer of power wirelessly. The fabricated WPT system of size 35.8 mm × 20 mm achieves, for the first time, a figure of merit of more than one at a WPT distance from 40 to 44 mm.

DOI： 10.1109/LMWC.2017.2750032

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This paper investigates a possibility of application of a virtual inductor realized by an integrated defected ground structure (DGS) to design a front-end circuit in CMOS technology. Two types of DGS are analyzed and found that the inductance realized by a square-shaped DGS achieves smaller size and higher quality factor than an H-shaped DGS. Then, a 15-GHz low phase noise voltage-controlled oscillator (VCO) employing the proposed square-shaped DGS in 0.18-$mu ext{m}$ 1P6M CMOS technology is designed. The fabricated VCO operates from 15.2 to 16.12 GHz and consumes 5-mW power. The measured phase noise is-132.08 dBc/Hz at 10-MHz offset frequency, and this results in the figure of merit (FoM) and FoM taking account of the area to be 189.1 and 199.9 dB, respectively.

DOI： 10.1109/JEDS.2017.2728686

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This letter presents a 60-GHz ultracompact on-chip bandpass filter (BPF). The designed filter is based on a unique structure, which consists of two overlapped broadside-coupled open-loop resonators, achieving a high level of miniaturization. Moreover, each resonator is loaded by a metal-insulator-metal capacitor to get further miniaturization. Defected ground structure pattern is constructed under the filter structure to enhance the insertion loss (IL). This BPF is designed and fabricated using a standard 0.18- μ complementary metal-oxide-semiconductor technology for millimeter-wave applications. The fabricated BPF chip size is 240 × 225-μ 2 including pads. The measured results agree well with the simulation ones and show that the BPF has an IL of 3.3 dB at 59.5-GHz center frequency, and a bandwidth of 12.9 GHz.

DOI： 10.1109/LMWC.2017.2734771

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper describes the design of a couple of a bow-tie Defected Ground Structure (DGS) resonator with high efficiency and compact size for near field Wireless Power Transfer (WPT) system. The proposed WPT is experimentally measured. The resonant frequency is at 0.26GHz, with low insertion loss, |S21| = -1.9dB and low return loss, |S11| < -17dB. The Measured result shows that the proposed WPT has a power efficiency of 65&#37; at distance 10mm.

DOI： 10.1109/APMC.2017.8251489

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

In this paper, we propose a K-band voltage controlled oscillator (VCO) using defected ground structure (DGS) that realizes the series resonant and parallel resonant characteristic. An H-shaped DGS etched at the lowest metal layer (M1) below microstrip line (MSL) on the top metal layer (M6) of 0.18 μm 1P6M CMOS process. The MSL is etched in the middle to realize series capacitance, which produces series resonance characteristics and sharpens the response of magnitude of Z11 (mag|Z11|). The proposed DGS resonator achieved smaller size and high quality (Q-) factor. The post-layout simulation result shows that VCO has a tuning range of 3.4&#37;, and a low phase noise with -110.9 dBc/Hz @1 MHz offset at 21.02 GHz oscillation. The VCO consumes 7.5 mW power resulting in a FoM of 188.7 dB.

DOI： 10.1109/APMC.2017.8251624

記述言語：英語   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a simple and precise design method for asymmetric resonant inductive coupled wireless power transfer (WPT) systems without the involvement of circuit or electromagnetic (EM) simulators. The design method is based on the generalized second-order band-pass filter (BPF). First, the values of the BPF's J-inverters are computed based on the mutual coupling between the transmitter (TX) and the receiver (RX). Then, the required components are extracted from the J-inverters values. We achieved good agreements between the analytical design procedure, the circuit and the EM simulations, and the measurements. The measured efficiency is 75&#37; at a transmission distance of 38 mm, and the sizes of the TX and RX are 50×50 mm2 and 30×30 mm2, respectively.

DOI： 10.1109/APMC.2016.7931382

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a low insertion less 60 GHz on-chip bandpass filter (BPF) on 0.18 μm standard CMOS technology. For insertion loss minimization, this BPF uses the H-shaped resonator which couples through two branches and the rectangular defected ground structures (DGS) which reduce the external quality factor. Besides, this BPF employs metal-insulator-metal capacitor to ensure size compactness. The fabricated BPF chip size is 240 μm × 650 μm. The simulation results agree well with the measured ones. The measured insertion loss is 2.1 dB at 60GHz.

DOI： 10.1109/RWS.2017.7885983

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This paper presents a novel technique for high efficiency and compact size wireless power transfer (WPT) systems. These systems are based on coupled defected ground structure (DGS) resonators. Two types of DGSs (H-shape and semi-H-shape) are proposed. The semi-H-shaped DGS realizes larger inductance value, and this results in higherWPT efficiency. Instead of using an inductive-fed resonant coupling, we propose capacitive-fed resonant coupling, which reduces the design complexity and enhances the efficiency further. The DGS resonator of both the systems is loaded by chip capacitors for miniaturization. An equivalent circuit using approximate quasi-static modeling is extracted. An analytical design procedure is developed to calculate the optimum design parameters for the proposed WPT systems. The optimized structures are fabricated and measured. The simulation and measurement results are in good agreement. The proposed semi-H-shaped DGS WPT system has a peak efficiency of 73&#37; at a transmission distance of 25 mm. In turn, the figure of merit becomes the highest among the WPT systems proposed so far.

DOI： 10.1109/TMTT.2016.2618919

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This article presents a 60 GHz circular patch Antenna-on-Chip (AoC) on asymmetric Artificial Magnetic Conductor (AMC) designed and fabricated using the TSMC 0.18 μm CMOS process. An AMC plane allows a positive reflection coefficient within the bandwidth of interest so incident and reflected waves are in phase. At the AMC frequency of operation, a high impedance is generated which reduces surface waves and thus enhances gain. At first, circular AoC performance is enhanced using a square AMC. However, square AMC cells suffer from discontinuities that affect performance when using lengthy feed lines to connect the AoC to a front-end circuit. To overcome this problem, an asymmetric rectangular (R-AMC) is employed. A modified asymmetric AMC is used with a circular AoC for further gain enhancement. The area of the fabricated design is only 1715 μm × 710 μm. Measured |S11|, gain and radiation patterns are reported.

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents the design of low noise LC oscillator that employs an enhanced inductor, where a distributed grid of N-well in P-substrate of the inductor was design to improve the quality factor of the inductor, therefore improves the phase noise of the oscillator. The electromagnetic (EM) simulation shows that the total equivalent resistance of an inductor is reduced, which results in a higher quality factor. A 5.5GHz cross-coupled CMOS LC oscillator is designed by using this new inductor. Based on the simulation results, the oscillator shows an improvement of 0.7 dBc/Hz in phase noise at 1MHz offset from the carrier, which results a FOM of 189.

DOI： 10.1109/APCCAS.2016.7803949

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This letter presents a new design for wireless power transfer (WPT) applications using two coupled bandstop filters (BSF). The stopband is created by etching a defected structure on the ground plane, and the power is transferred through electromagnetic (EM) resonant coupling when the two BSFs are coupled back to back. An equivalent circuit model of the proposed WPT system is extracted. Verification of the proposed design is performed through a good agreement between the EM simulation, circuit simulation, and measurement results. The proposed system achieves a measured WPT efficiency of 68.5&#37; at a transmission distance of 50 mm using a compact size (40 × 40mm2). This results in a figure of merit of the proposed system to be 0.856 and the ratio of transmission distance/lateral size is 1.25 that is the highest among the WPT systems proposed so far using planar structures.

DOI： 10.1109/LMWC.2016.2601300

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This paper presents a new design for wireless power transfer (WPT) systems using asymmetric structures for the transmitter (TX) and the receiver (RX), and the TX/RX are constructed using spiral-strips defected ground structure (DGS) resonators. The proposed spiral-strips DGS resonator overcome the problem of low self-inductance that encountered by H-shape DGS resonator in [1, 2], so that the proposed WPT system that employs the proposed spiral-strips DGS resonators has better efficiency and higher power transmission distance. Design methodology of the proposed WPT system are formulated and fabricated. The measurement results show a WPT efficiency of 78&#37; at a transmission distance of 40mm with the TX and RX areas of 50 × 50mm2 and 30 × 30mm2, respectively.

DOI： 10.1587/elex.13.20160591

記述言語：その他   掲載種別：研究論文（学術雑誌）  

In this letter, we propose a compact size, small insertion loss 60 GHz on-chip H-shaped resonator bandpass filter (BPF) using 0.18 μm standard CMOS technology. The BPF Size is miniaturized by loading the H-shaped resonator with metal-insulator-metal capacitors at its ends. Besides, two defected ground structure cells are etched under the coupled lines to improve the filter insertion loss. Furthermore, selectivity is enhanced by loading the center of the H-shaped resonator with two unsymmetrical meander line stubs generating two transmission zeroes at 50 and 70 GHz. The fabricated BPF chip size is 240 × 650 μm2. The measured insertion loss and fractional bandwidth are 2.5 dB at 60 GHz and 21&#37;, respectively.

DOI： 10.1109/LMWC.2016.2597219

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This paper presents a novel technique to improve the quality factor (Q-factor) of a standard inductor in Si-substrate without post-processing. The proposed method employs a distributed grid of N-well in the Psubstrate beneath the inductor. This will create a layer of PN junctions. The width of the N-well is chosen wisely so that full depletion occurs in every PN junction, forming a large depleted area which has high resistivity, thus reduces the substrate loss and increases Q-factor of the inductor. An example of the proposed idea is illustrated using a 1nH inductor in 0.18 mm CMOS technology. In this paper, High-Frequency Simulation Structure (HFSS)1) based on finite element method is used for simulation. As expected, the electromagnetic (EM) simulation shows that the total equivalent resistance of the inductor decreases, resulting in the improvement of its Q-factor by 9%. Finally, the improved inductor is used to design a 5GHz cross-coupled CMOS LC oscillator, which results in an improvement of 2.1dBc/Hz of phase noise at 10 kHz offset frequency.

その他リンク： http://jairo.nii.ac.jp/0001/00389403

記述言語：その他   掲載種別：研究論文（学術雑誌）  

This paper presents a novel technique to improve the quality factor (Q-factor) of a standard inductor in Si-substrate without post-processing. The proposed method employs a distributed grid of N-well in the P-substrate beneath the inductor. This will create a layer of PN junctions. The width of the N-well is chosen wisely so that full depletion occurs in every PN junction, forming a large depleted area which has high resistivity, thus reduces the substrate loss and increases Q-factor of the inductor. An example of the proposed idea is illustrated using a 1nH inductor in 0.18 μm CMOS technology. In this paper, High-Frequency Simulation Structure (HFSS)1) based on finite element method is used for simulation. As expected, the electromagnetic (EM) simulation shows that the total equivalent resistance of the inductor decreases, resulting in the improvement of its Q-factor by 9&#37;. Finally, the improved inductor is used to design a 5GHz cross-coupled CMOS LC oscillator, which results in an improvement of 2.1dBc/Hz of phase noise at 10 kHz offset frequency.

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a simple compact design for wireless charging applications using asymmetric strongly coupled printed resonators (SCPR). The proposed resonators are further loaded by surface mounted (SMD) capacitors for miniaturization. The system consists of two substrates. The first transmitting substrate contains a driving loop on the top layer and the high Q-resonator on the bottom layer. Similarly, the second substrate contains the high Q-resonator as the receiver and a loop as the load. An equivalent circuit model is extracted. An analytic design method is proposed to get a high wireless power transfer (WPT) efficiency. Good agreement between electromagnetic simulations, circuit simulations, and measurements was achieved. The proposed system achieves a measured WPT efficiency of 60&#37; at 100 MHz using a receiving resonator of size 20 mm × 20 mm away for a transmission distance of 35 mm from the transmitting resonator of size 30 mm × 30 mm.

DOI： 10.1109/WAMICON.2016.7483829

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a study on 60 GHz CMOS Quasi-Yagi antenna for radiation performance enhancement. The driven element is meandered for size compactness and is fed by a coplanar waveguide to coplanar stripline transition. Moreover, the ground plan was corrugated to serve as the reflecting element. Furthermore, the director was designed from multi-element which led to gain and efficiency enhancement. Finally, the effect of the antenna location on the radiation characteristics was studied. The simulated gain and efficiency are-0.746 dBi and 21.4&#37;, respectively at 60 GHz, and The design has an area of 1 × 0.87 mm2.

DOI： 10.1109/WAMICON.2016.7483819

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a design of 60-GHz exponential tapered slot Vivaldi antenna-on-chip (AOC). The antenna is designed using standard 0.18μm six metal-layers CMOS technology. A double-Y balun feeding structure is used to make transition from coplanar waveguide to slot-line. Two techniques are investigated for improving antenna radiation properties. The first technique incorporates equal corrugations on the edges of exponential flaring section and other on the backed-edge of antenna to enhance the antenna gain. Second, a planar arc reflector is constructed using metal vias between M6 and M1 to inhibit the back lobe, contributing to the enhancement of gain and efficiency. The overall antenna size is compact and equal to 785μm×930μm. The influence of the antenna position on the radiation properties is also studied. The proposed antenna offers endfire radiation pattern with a simulated peak gain and a radiation efficiency of -0.4 dBi and 32&#37;, respectively.

DOI： 10.1109/EuCAP.2016.7481426

記述言語：英語   掲載種別：研究論文（学術雑誌）  

A 60 GHz miniaturised, low loss on-chip bandpass filter (BPF) based on open-loop resonators is presented. Overlapping of the BPF's resonators leads to miniaturisation and introduces a mixed coupling con-figuration. Moreover, its resonators are folded to minimise the size and the insertion loss (IL). H-shaped defected ground structures are also used to reduce IL and to improve the out of band rejection. The measured IL, return loss, centre frequency, and bandwidth are 2.85 dB, 18 dB, 59 GHz and 15.5 GHz with a chip size of 368 × 262 μm2 including pads.

DOI： 10.1049/el.2015.4465

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This letter presents a miniaturized low loss mixed coupled on-chip band-pass filter using overlapped open loop ring resonators and using patterned ground shields. The fabricated prototype shows an insertion loss of 3.7 dB, a return loss > 20 dB, a bandwidth of 13 GHz, and a chip size of 700 μm × 450 μm.

DOI： 10.1002/mop.29650

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a study of the effect of the SiO2 substrate thickness on the insertion loss performance of half wavelength open loop resonator bandpass filter. It has been observed that the main reason for insertion loss degradation is the small thickness of SiO2. An insertion loss of -1.49dB is achieved with a SiO2 thickness of 24μm. Furthermore, an equivalent lumped circuit model of the filter is proposed to verify this observation. The S-parameters of lumped element circuit model are obtained using the ADS simulator and compared with the results obtained from the EM simulator showing good agreement.

DOI： 10.1109/ICECS.2015.7440292

記述言語：英語   掲載種別：研究論文（その他学術会議資料等）  

A60-GHz double-Y balun-fed exponential tapered slot Vivaldi antenna-on-chip (AOC) is designed using standard 0.18μm six metal-layer CMOS technology. A double-Y balun feeding structure is used to make transition from coplanar to slot line. Three methods are developed for improving antenna radiation properties. First, an impeding longitudinal rectangular slits on the backed edge of the Vivaldi antenna are used to enhance the gain. Second, loading circular metal-strips are used as additional director into the slot area of Vivaldi antenna on M6. Finally, a planar arc reflector is used to inhibit the back lobe, contributing to the enhancement of gain and efficiency. The overall antenna size is very compact and equal to 700um × 940μm. The influence of the antenna position on the radiation properties is also studied. The proposed antenna offers a simulated peak gain and a radiation efficiency of-1.9 dBi and 24&#37;, respectively.

DOI： 10.1109/ICM.2015.7438050

記述言語：英語   掲載種別：研究論文（その他学術会議資料等）  

A design of an improved open loop resonator on-chip bandpass filter for 60 GHz millimeter-wave applications using 0.18 μm CMOS technology is presented. The proposed on-chip BPF employs H-shaped parasitic structure inserted between two open loop coupled resonator. The adoption of a two open loop coupled resonators BPF and the utilization of two transmissions zero located at 48 and 80 GHz permit a compact size and high selectivity of the BPF. In addition, the parasitic H-shaped structure increases the capacitance between the two resonators, which enables a further reduction of the physical length of the filter and enhances the coupling between the resonators which improve the filter insertion loss. The proposed BPF has a center frequency of 60 GHz, an insertion loss of-2 dB, a 3dB band width of 13 GHz, and a core size 160 × 480 μm2 with total chip size 680 × 280 μm2 (including bonding pads).

DOI： 10.1109/ICM.2015.7438049

記述言語：英語   掲載種別：研究論文（学術雑誌）  

This paper presents a novel technique to enhance Antenna-on- Chip gain by introducing a high resistivity layer below it. Instead of using the costly ion implantation method to increase resistivity, the N-well that is available in the standard CMOS process is used. A distributed grid structure of N-well on P-type substrate is designed such that the P and N semiconductors types are fully depleted forming a layer with high resistivity. By an electromagnetic simulation, the using depletion layers enhance the antenna gain and radiation efficiency without increasing the occupied area. The simulated and measured |S11| are in fair agreement. The measured gain is −1.5 dBi at 66 GHz.

DOI： 10.1587/elex.13.20151115

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a Mu Near Zero Metamaterial (MNZ-MM) lens to enhance the gain of a 60 GHz Antenna-on-Chip (AoC). First, a MNZ-MM unit cell is designed to ensure the near zero characteristics at the 60 GHz band. Furthermore, a 3 by 3 matrix of the MNZ-MM is placed in the desired direction of radiation such that the radiated waves are coupled and the gain is enhanced and the AoC's |S11| is negligibly affected. The simulated gain and efficiency of the AoC with MNZ-MM lens are 2.8dBi and 35&#37;, respectively.

DOI： 10.1109/APCAP.2015.7374402

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a miniaturized triangular Antenna-on-Chip (AoC) designed and fabricated on a 0.18 μm CMOS process using asymmetric rectangular artificial magnetic conductor (R-AMC). An AMC acts as a shield plane between the AoC and the lossy CMOS substrate. AoC using asymmetric R-AMC presents a smaller overall area than that of the previous reported AoC with symmetric AMCs. The triangular AoC area including the asymmetric AMC cells is only 0.81mm² with a simulated gain of -0.2 dBi at 60 GHz. Measurements confirm the wide impedance bandwidth of the AoC.

DOI： 10.1109/SIRF.2015.7119885

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a small size 60 GHz Antenna-on-Chip (AoC) designed and fabricated using 0.18 um TSMC Complementary Metal Oxide Semiconductor (CMOS) process. AoC performance is enhanced using asymmetric Artificial Magnetic Conductor (AMC). The AoC area including the AMC is 1715 um by 710 um. As AMC shields AoC from the lossy CMOS substrate, simulated gain of -0.25 dBi is achieved at 60 GHz for design rule compatible circular AoC with 12.8 dB front-to-back ratio (FBR) due to removal of AMC cells below the AoC. Measurements agree well with simulation results and confirm operation at the 60 GHz band with a peak measured gain of -3 dBi at 64 GHz.

DOI： 10.1109/EuMC.2014.6986380

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

Antenna-on-Chip (AoC) integration with other radio frequency and digital circuits is a prime target for complete System-on-Chip (SoC). However, CMOS AoC integration suffers from two main disadvantages. First, AoC suffers from losses due to low resistivity CMOS substrate (σ=10S/m) which leads to reduction of the AoC efficiency (A. Barakat, et al, IEEE IMS, June2013). Second, AoC occupies a large area that cannot be reused because of the strong field below the AoC.

DOI： 10.1109/USNC-URSI.2014.6955519

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents a compact size, high gain triangular Antenna-on-Chip (AoC), designed and fabricated using a 0.18 μm CMOS process and optimized over different cells' configurations of rectangular artificial magnetic conductor (R-AMC). An AMC acts as a shield plane between the AoC and the lossy CMOS substrate. R-AMC shows better shielding characteristics than previously reported AMCs. Measurement results confirm the wide impedance bandwidth of the AoC. © 2013 IEEE.

DOI： 10.1109/MWSYM.2013.6697475

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

A high-gain and small-area triangular monopole Antenna-on-Chip (AOC), designed using a standard CMOS process and optimized over a modified rectangular Artificial Magnetic Conductor (AMC). The rectangular AMC acts as a shield between the AOC and the lossy CMOS substrate. Using this configuration, a Frequency Selective Surface (FSS) is realized by the shield providing high wave impedance around 60 GHz. The AOC dimensions including the AMC are 0.86 mm by 1.76mm. The antenna gain is 0.3 to 1 dBi from 57 to 64 GHz. © 2012 IEEE.

DOI： 10.1109/EuCAP.2012.6206127

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

This paper presents an optimization methodology for a 60 GHz triangular monopole Antenna-on-Chip (AOC), designed using a standard 0.18 m CMOS process and optimized over a Jerusalem Cross Artificial Magnetic Conductor (JC-AMC). The JC-AMC acts as a shield between the AOC and the lossy CMOS substrate. Different configurations of JC-AMC cells are tested to acquire best AOC performance. It has been found that increasing the number of JC-AMC cells in the feeding direction and decreasing its number of cells in the direction perpendicular to the feed can improve the antenna characteristics in terms of gain, efficiency, front-to-back ratio, and small area. © 2012 IEEE.

DOI： 10.1109/JEC-ECC.2012.6186968

記述言語：その他   掲載種別：研究論文（その他学術会議資料等）  

In this paper, an ultra-wideband (UWB) antenna with a band notched filter is proposed. The transmission range of this antenna covers the FCC unlicensed band from 3.1 to 10.6 GHz with a notch filter from 4.9 to 6.3 GHz to avoid interference with IEEE802.11a system. The notch filter is implemented using a U-shaped slot. To extend the impedance bandwidth of the antenna, an electroband-gap (EBG) structure is used. EBG lattice holes surrounding the radiating patch enhances the impedance bandwidth to be from 3 GHz to 12 GHz with a return loss (S11 < -10 dB). The return loss (S11) for the designed antenna is simulated using HFSS® software package. The antenna design is also fabricated on Rogers RO3006 substrate and measured using Vector Network Analyzer (HP8719ES). The measurement results also confirm that the proposed technique is effective in extending the impedance bandwidth to 12 GHz. © 2010-IEEE APS.

DOI： 10.1109/MECAP.2010.5724184

開催年月日： 2015年12月

記述言語：英語   会議種別：口頭発表（一般）  

国名：モロッコ王国  

A60-GHz double-Y balun-fed exponential tapered slot Vivaldi antenna-on-chip (AOC) is designed using standard 0.18μm six metal-layer CMOS technology. A double-Y balun feeding structure is used to make transition from coplanar to slot line. Three methods are developed for improving antenna radiation properties. First, an impeding longitudinal rectangular slits on the backed edge of the Vivaldi antenna are used to enhance the gain. Second, loading circular metal-strips are used as additional director into the slot area of Vivaldi antenna on M6. Finally, a planar arc reflector is used to inhibit the back lobe, contributing to the enhancement of gain and efficiency. The overall antenna size is very compact and equal to 700um×940μm. The influence of the antenna position on the radiation properties is also studied. The proposed antenna offers a simulated peak gain and a radiation efficiency of -1.9 dBi and 24%, respectively.

その他リンク： http://ieeexplore.ieee.org/document/7438050/

開催年月日： 2015年12月

記述言語：英語   会議種別：シンポジウム・ワークショップ パネル（公募）  

国名：エジプト・アラブ共和国  

This paper presents a study of the effect of the SiO2 substrate thickness on the insertion loss performance of half wavelength open loop resonator bandpass filter. It has been observed that the main reason for insertion loss degradation is the small thickness of SiO2. An insertion loss of -1.49dB is achieved with a SiO2 thickness of 24μm. Furthermore, an equivalent lumped circuit model of the filter is proposed to verify this observation. The S-parameters of lumped element circuit model are obtained using the ADS simulator and compared with the results obtained from the EM simulator showing good agreement.

その他リンク： http://ieeexplore.ieee.org/document/7440292/

開催年月日： 2015年6月 - 2015年7月

記述言語：英語   会議種別：口頭発表（一般）  

国名：インドネシア共和国  

This paper presents a Mu Near Zero Metamaterial (MNZ-MM) lens to enhance the gain of a 60 GHz Antenna-on-Chip (AoC). First, a MNZ-MM unit cell is designed to ensure the near zero characteristics at the 60 GHz band. Furthermore, a 3 by 3 matrix of the MNZ-MM is placed in the desired direction of radiation such that the radiated waves are coupled and the gain is enhanced and the AoC's |S11| is negligibly affected. The simulated gain and efficiency of the AoC with MNZ-MM lens are 2.8dBi and 35%, respectively.

その他リンク： http://ieeexplore.ieee.org/document/7374402/

開催年月日： 2015年1月

記述言語：英語  

開催地：Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2015 IEEE 15th Topical Meeting on   国名：アメリカ合衆国  

This paper presents a miniaturized triangular Antenna-on-Chip (AoC) designed and fabricated on a 0.18 μm CMOS process using asymmetric rectangular artificial magnetic conductor (R-AMC). An AMC acts as a shield plane between the AoC and the lossy CMOS substrate. AoC using asymmetric R-AMC presents a smaller overall area than that of the previous reported AoC with symmetric AMCs. The triangular AoC area including the asymmetric AMC cells is only 0.81mm2 with a simulated gain of -0.2 dBi at 60 GHz. Measurements confirm the wide impedance bandwidth of the AoC.

その他リンク： http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=7119885&abstractAccess=no&userType=inst

開催年月日： 2014年10月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：Rome   国名：イタリア共和国  

This paper presents a small size 60 GHz Antenna-on-Chip (AoC) designed and fabricated using 0.18 um TSMC Complementary Metal Oxide Semiconductor (CMOS) process. AoC performance is enhanced using asymmetric Artificial Magnetic Conductor (AMC). The AoC area including the AMC is 1715 um by 710 um. As AMC shields AoC from the lossy CMOS substrate, simulated gain of -0.25 dBi is achieved at 60 GHz for design rule compatible circular AoC with 12.8 dB front-to-back ratio (FBR) due to removal of AMC cells below the AoC. Measurements agree well with simulation results and confirm operation at the 60 GHz band with a peak measured gain of -3 dBi at 64 GHz.

その他リンク： http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6986380&abstractAccess=no&userType=inst

開催年月日： 2014年7月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：Memphis   国名：アメリカ合衆国  

Antenna-on-Chip (AoC) integration with other radio frequency and digital circuits is a prime target for complete System-on-Chip (SoC). However, CMOS AoC integration suffers from two main disadvantages. First, AoC suffers from losses due to low resistivity CMOS substrate (σ=10S/m) which leads to reduction of the AoC efficiency (A. Barakat, et al, IEEE IMS, June2013). Second, AoC occupies a large area that cannot be reused because of the strong field below the AoC.

その他リンク： http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6955519&abstractAccess=no&userType=inst

開催年月日： 2013年6月

記述言語：英語   会議種別：口頭発表（一般）  

国名：アメリカ合衆国  

This paper presents a compact size, high gain triangular Antenna-on-Chip (AoC), designed and fabricated using a 0.18 μm CMOS process and optimized over different cells' configurations of rectangular artificial magnetic conductor (R-AMC). An AMC acts as a shield plane between the AoC and the lossy CMOS substrate. R-AMC shows better shielding characteristics than previously reported AMCs. Measurement results confirm the wide impedance bandwidth of the AoC.

その他リンク： http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6697475

開催年月日： 2012年3月

記述言語：英語   会議種別：口頭発表（一般）  

国名：チェコ共和国  

A high-gain and small-area triangular monopole Antenna-on-Chip (AOC), designed using a standard CMOS process and optimized over a modified rectangular Artificial Magnetic Conductor (AMC). The rectangular AMC acts as a shield between the AOC and the lossy CMOS substrate. Using this configuration, a Frequency Selective Surface (FSS) is realized by the shield providing high wave impedance around 60 GHz. The AOC dimensions including the AMC are 0.86 mm by 1.76mm. The antenna gain is 0.3 to 1 dBi from 57 to 64 GHz.

その他リンク： http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=6206127&abstractAccess=no&userType=inst

開催年月日： 2012年3月

記述言語：英語   会議種別：口頭発表（一般）  

国名：エジプト・アラブ共和国  

This paper presents an optimization methodology for a 60 GHz triangular monopole Antenna-on-Chip (AOC), designed using a standard 0.18 μm CMOS process and optimized over a Jerusalem Cross Artificial Magnetic Conductor (JC-AMC). The JC-AMC acts as a shield between the AOC and the lossy CMOS substrate. Different configurations of JC-AMC cells are tested to acquire best AOC performance. It has been found that increasing the number of JC-AMC cells in the feeding direction and decreasing its number of cells in the direction perpendicular to the feed can improve the antenna characteristics in terms of gain, efficiency, front-to-back ratio, and small area.

その他リンク： http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=6186968&abstractAccess=no&userType=inst

開催年月日： 2010年10月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：Antennas and Propagation (MECAP), 2010 IEEE Middle East Conference on   国名：エジプト・アラブ共和国  

In this paper, an ultra-wideband (UWB) antenna with a band notched filter is proposed. The transmission range of this antenna covers the FCC unlicensed band from 3.1 to 10.6 GHz with a notch filter from 4.9 to 6.3 GHz to avoid interference with IEEE802.11a system. The notch filter is implemented using a U-shaped slot. To extend the impedance bandwidth of the antenna, an electroband-gap (EBG) structure is used. EBG lattice holes surrounding the radiating patch enhances the impedance bandwidth to be from 3 GHz to 12 GHz with a return loss (S11 <; -10 dB). The return loss (S11) for the designed antenna is simulated using HFSS® software package. The antenna design is also fabricated on Rogers RO3006 substrate and measured using Vector Network Analyzer (HP8719ES). The measurement results also confirm that the proposed technique is effective in extending the impedance bandwidth to 12 GHz.

その他リンク： http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5724184&abstractAccess=no&userType=inst

開催年月日： 2022年12月

記述言語：英語   会議種別：口頭発表（招待・特別）  

開催地：Egypt-Japan University of Science and Technology, Alexandria   国名：エジプト・アラブ共和国  

開催年月日： 2022年4月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：London   国名：グレートブリテン・北アイルランド連合王国(英国)  

Recently, defected ground structure (DGS) resonators have been employed to design a low phase noise Voltage-Controlled Oscillator (VCO) for quasi-millimeter wave applications [10]. A few advantages of such VCOs are that a DGS resonator has a higher Q-factor than an on-chip spiral inductor, and it has a higher self-resonance frequency compared to a conventional LC resonator so that a stable inductance value with respect to the frequency can be realized. However, one of its drawbacks is that the tuning range of DGS-based VCOs is limited. In this paper, a method to realize a wide tuning range of DGS-based VCOs has been proposed using two interconnected DGS resonators. As a result, the designed VCO implemented in 0.18-µm 1P6M CMOS technology achieves a 19.8% tuning range with the best phase noise performance of -109.43dBc/Hz at 1-MHz offset frequency in simulations. The experiment result shows that the fabricated VCO has a phase noise of -108.41dBc/Hz at 1-MHz offset frequency with the carrier frequency of 18.51GHz, which exhibits good agreement with the simulation.

その他リンク： https://ieeexplore.ieee.org/document/9783689

開催年月日： 2022年4月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：London   国名：グレートブリテン・北アイルランド連合王国(英国)  

A miniaturized shielded folded ridged quarter-mode Substrate Integrated Waveguide (FRQMSIW) resonator in 1P6M CMOS technology is presented for millimetre wave applications. By adding a capacitive ridge and folded it inside the resonator, a significant miniaturization is realized. An additional shielded structure is employed to mitigate the leakage from the effective perfect conductor of the conventional quarter-mode SIW cavity. The characteristics of the proposed resonator are investigated first and then employed to design a 100GHz bandpass filter (BPF) with two transmission zeros. Finally, the proposed filter is implemented in 1P6M CMOS technology and measured. The active size of the proposed BPF without pads is 309μm×275μm(∼0.1λ×∼0.09 λ), and the measured insertion loss (|S21|) is 2.06dB.

その他リンク： https://ieeexplore.ieee.org/document/9784336

開催年月日： 2022年4月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：London   国名：グレートブリテン・北アイルランド連合王国(英国)  

Wireless charging of biomedical implants will make the life of patients with implants much easier. However, it is associated with significant design challenges - efficiency degradation and the need to meet standards for exposure to electromagnetic fields. Biomedical tissue dielectric and conductive properties affect the electrical performance of an inductor, which appears on increased effective inductance, reduced quality factor, and reduced self-resonance. Building a wireless power transfer (WPT) system using such inductors leads to low efficiency and low power that limit specific absorption rate. In this work, we study the characteristics of inductance in biomedical tissue and present a theory to maintain the effective inductance with the same value in the air and biomedical tissue. Finally, to overcome these issues, we propose a metamaterial inspired geometry with near-zero permeability. This metamaterial inspired geometry is stacked split ring resonator metamaterial fed by a driving inductive loop and acts as a WPT transmitter for an in-tissue implanted WPT receiver. The presented demonstrations have confirmed that the proposed metamaterial inspired WPT system outperforms the conventional one. Also, the resonance frequency of the proposed metamaterial inspired TX is negligibly affected by the tissue characteristics, which is of great interest from the design and operation prospects. Furthermore, the proposed WPT system can be used with more than twice the input power of the conventional one while complying with the safety regulations of electromagnetic waves exposure.

その他リンク： https://ieeexplore.ieee.org/document/9784207

開催年月日： 2022年4月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：London   国名：グレートブリテン・北アイルランド連合王国(英国)  

The conventional inductive wireless power transfer (WPT) systems have a trade-off between transmission distance and size. Furthermore, when the transmitter and receiver go away from the line of sight, the performance due to this so-called misalignment will sharply drop. In this work, a new type of metasurfaces called stacked metasurface is proposed, and its effectiveness to mitigate above problems are studied experimentally. As a result, by using the proposed metasurface, we succeeded in achieving a transmission distance between the transmitter and the receiver of 70 mm, which is more than double than its original transmission distance without the metasurface when the maximum efficiency occurs. At this enhanced transmission distance, the efficiency of the WPT system has improved from 2% to 60%.

その他リンク： https://ieeexplore.ieee.org/document/9784281

開催年月日： 2022年4月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：London   国名：グレートブリテン・北アイルランド連合王国(英国)  

This paper proposes a compact, high quality (Q-) factor cavity in commercial CMOS technology for terahertz band applications. The proposed cavity consists of a folded quarter-mode substrate integrated waveguide (QMSIW) topology. It also outlines some guidelines for creating layouts with specific foundries, particularly for building vertical walls using an array of vias. The cavity was implemented in 0.18 µm CMOS technology and measurements were taken. The measurements showed that the resonant frequency and reflection coefficient were 96.9 GHz and -30.14 dB, respectively, in good agreement with the simulation results. The area of the proposed cavity was 0.0506 mm2 without measurement pads, which is only 2.4% and 8.9% when compared to the standard full-mode SIW cavity and the recently proposed 87 GHz.

その他リンク： https://ieeexplore.ieee.org/document/9784193

開催年月日： 2021年6月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：Atlanta   国名：アメリカ合衆国  

This paper presents a novel design for a compact dual-band wireless power transfer (WPT) system through biological tissues using dual-reference defected ground structure (DGS) resonators. Overlapping is used to minimize the size to be suitable for biomedical applications. The proposed DGS resonator exhibits bandstop characteristics at two different frequencies depending on the excitation reference-plane. Then, two coupled sets of the proposed dual-reference DGS, in a back-to-back configuration, achieves a dual-band WPT system. The sizes of the receiver and transmitter are 15 mm × 15 mm and 18 mm × 18 mm, respectively. The measured efficiencies are 60.3% at 381 MHz and 54.3% at 750 MHz when the receiver is embedded in chicken breast within a depth of 10 mm, while the overall WPT distance of 11 mm

その他リンク： https://ieeexplore.ieee.org/document/9574938

開催年月日： 2021年6月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：San Diego   国名：アメリカ合衆国  

This paper proposes a three-layers stack metasurface first, and then employed it to a compact double-band wireless power transfer (WPT) system. For the proposed dual-band WPT system, the metasurface exhibits the wide-band characteristic of the negative-near-zero permeability from 222 MHz to 889 MHz, where the transmission efficiency improves significantly at longer WPT distance at the lower band. Only a unit cell is stacked in three layers so that the size of the proposed metasurface has significantly reduced compared to a conventional metasurface where several unit cells are arranged in 1-D topology. The size of the proposed WPT system and the metasurface is 15 x15 mm and 20 x20 mm, respectively. Also, capacitors with the value of 0.1pF are etched on the gaps of the metasurface. The measured efficiencies' improvement ratios are 1.13 at 390 MHz in the air, where the WPT distance is significantly improved from 19 mm to 23 mm.

その他リンク： https://ieeexplore.ieee.org/document/9458177

開催年月日： 2021年1月

記述言語：英語   会議種別：口頭発表（一般）  

開催地：Utrecht   国名：オランダ王国  

This paper presents a C-band low phase noise oscillator using small size low-profile substrate integrated waveguide (SIW) resonator for RF applications. A compact 6 GHz SIW resonator size is possible by introducing λ g /4 resonating slots. A size reduction of 29.87% is achieved while maintaining the quality factor. Also, the impedance of the SIW resonator is controlled by appropriate selection of the location of these introduced slots; which advantages for the conjugate matching between SIW resonator and the active device and removes the need of matching circuit between them. Then, a C-band oscillator prototype utilizing the proposed compact SIW resonator is designed, fabricated and measured. The measured results shows a phase noise of -122.11 dBc/Hz at 1 MHz offset with an output power of -4.2 dBm at 5.96 GHz oscillation frequency.

その他リンク： https://ieeexplore.ieee.org/document/9338129

開催年月日： 2017年1月

記述言語：英語   会議種別：口頭発表（一般）  

国名：アメリカ合衆国  

This paper presents a low insertion less 60 GHz on-chip bandpass filter (BPF) on 0.18 μm standard CMOS technology. For insertion loss minimization, this BPF uses the H-shaped resonator which couples through two branches and the rectangular defected ground structures (DGS) which reduce the external quality factor. Besides, this BPF employs metal-insulator-metal capacitor to ensure size compactness. The fabricated BPF chip size is 240 μm × 650 μm. The simulation results agree well with the measured ones. The measured insertion loss is 2.1 dB at 60GHz.

その他リンク： http://ieeexplore.ieee.org/document/7885983/

開催年月日： 2016年10月

記述言語：英語   会議種別：口頭発表（一般）  

国名：大韓民国  

その他リンク： http://ieeexplore.ieee.org/document/7803949/